DocID13496 Rev 4 7/25
L9777 Block diagrams and pins configuration
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1.3 Option C features
VDD can sustain short to 40 V regardless of VI battery voltage
Current capability of VDD scaled down to 50 mA with dropout of 1.5V (Max.)
In default condition, VDD and WD functions are disabled using 2 pull down current on
VDD_EN and WD_EN pin
Double reset function removed and pin RESET used to detect undervoltage condition
on VDD regulated voltage (VDD_LOW pin)
Figure 5. Package pin configuration (option C)
Table 2. Pin description
Pin# I/O Name Function
1 O RESET/VDD_LOW
OPTION A & B: RESET output.
This pin is set low if NMI output goes low for adjustable filter time
OPTION C: VDD_LOW output
This pin is set low when undervoltage on VDD is detected
2 O NMI
Non maskable Interrupt Output
This pin is set low when low voltage on VCC is detected or
frequency of WD signal is too low.
3I D
NMI/RESET power up delay.
External cap on this pin sets the time response of the VCC low
voltage detector and the time response of the watchdog monitor.
4 I VDD_EN
VDD control.
OPTION A: If this pin is low VDD output voltage is not available
(connect this pin to VCC or left floating to switch on VDD output
voltage)
OPTION B & C: If this pin is low or left floating VDD output
voltage is not available (connect this pin to VCC to switch on
VDD regulator)
5I WD
Watchdog input.
If the frequency at this input pin is too low, the NMI output is
activated low
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