NCV7344
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7
Table 5. ELECTRICAL CHARACTERISTICS V
CC
= 4.75 V to 5.25 V; V
IO
= 2.8 to 5.25 V; T
J
= 40 to +150°C; R
LT
= 60 W,
C
LT
= 100 pF, C
1
not used, C
RxD
= 15 pF unless specified otherwise.
Symbol UnitMaxTypMinConditionsParameter
BUS LINES (Pins CANH and CANL)
V
o(off)(CANL)
Recessive output voltage at pin CANL Standby mode;
R
LT
and C
LT
not used
0.1 0 0.1 V
V
o(off)(diff)
Differential bus output voltage
(V
CANH
V
CANL
)
Standby mode;
R
LT
and C
LT
not used
0.2 0 0.2 V
V
o(dom)(CANH)
Dominant output voltage at pin CANH V
TxD
= 0 V; t < t
dom(TxD);
50 W < R
LT
< 65 W
2.75 3.5 4.5 V
V
o(dom)(CANL)
Dominant output voltage at pin CANL V
TxD
= 0 V; t < t
dom(TxD);
50 W < R
LT
< 65 W
0.5 1.5 2.25 V
V
o(dom)(diff)
Differential bus output voltage
(V
CANH
V
CANL
)
V
TxD
= 0 V; dominant;
45 W < R
LT
< 65 W
1.5 2.25 3.0 V
V
o(dom)(diff)_arb
Differential bus output voltage during
arbitration (V
CANH
V
CANL
)
R
LT
= 2.24 kW (Note 10)
1.5 5.0 V
V
o(rec)(diff)
Differential bus output voltage
(V
CANH
V
CANL
)
V
TxD
= High; recessive; no load 50 0 +50 mV
V
o(dom)(sym)
Dominant output voltage driver symmetry
(V
CANH
+ V
CANL
)
R
LT
= 60 W; C
1
= 4.7 nF;
TxD = square wave up to 1 MHz
0.9 1.0 1.1 V
CC
I
o(sc)(CANH)
Short circuit output current at pin CANH 3 V < V
CANH
< +18 V 100 70 1.5 mA
I
o(sc)(CANL)
Short circuit output current at pin CANL 3 V < V
CANL
< +36 V 1.5 70 100 mA
V
i(rec)(diff)_NM
Differential input voltage range
recessive state
Normal or Silent mode;
12 V V
CANH
,
V
CANL
+12 V; no load
3.0 0.5 V
V
i(rec)(diff)_LP
Standby or Sleep mode;
12 V V
CANH
,
V
CANL
+12 V; no load
3.0 0.4 V
V
i(dom)(diff)_NM
Differential input voltage range
dominant state
Normal or Silent mode;
12 V V
CANH
,
V
CANL
+12 V; no load
0.9 8.0 V
V
i(dom)(diff)_LP
Standby or Sleep mode;
12 V V
CANH
,
V
CANL
+12 V; no load
1.05 8.0 V
V
i(diff)(th)_NORM
Differential receiver threshold voltage in
normal mode
12 V V
CANL
+12 V;
12 V V
CANH
+12 V
0.5 0.9 V
V
i(diff)(th)_NORM_H
Differential receiver threshold voltage in
normal mode, extended range
30 V < V
CANL
< +35 V;
30 V < V
CANH
< +35 V
0.4 1.0 V
V
i(diff)(th)_STDBY
Differential receiver threshold voltage in
standby mode
12 V V
CANL
+12 V;
12 V V
CANH
+12 V
0.4 1.05 V
R
i(cm)(CANH)
Commonmode input resistance at pin
CANH
2 V V
CANH
+7 V;
2 V V
CANL
+7 V
15 26 37
kW
R
i(cm)(CANL)
Commonmode input resistance at pin
CANL
2 V V
CANH
+7 V;
2 V V
CANL
+7 V
15 26 37
kW
R
i(cm)(m)
Matching between pin CANH and pin
CANL common mode input resistance
V
CANH
= V
CANL
= +5 V 1 0 +1 %
R
i(diff)
Differential input resistance 2 V V
CANH
+7 V;
2 V V
CANL
+7 V
25 50 75
kW
C
i(CANH)
Input capacitance at pin CANH V
TxD
= High; (Note 10) 7.5 20 pF
C
i(CANL)
Input capacitance at pin CANL V
TxD
= High; (Note 10) 7.5 20 pF
C
i(diff)
Differential input capacitance V
TxD
= High; (Note 10) 3.75 10 pF
NCV7344
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8
Table 5. ELECTRICAL CHARACTERISTICS V
CC
= 4.75 V to 5.25 V; V
IO
= 2.8 to 5.25 V; T
J
= 40 to +150°C; R
LT
= 60 W,
C
LT
= 100 pF, C
1
not used, C
RxD
= 15 pF unless specified otherwise.
Symbol UnitMaxTypMinConditionsParameter
TIMING CHARACTERISTICS (see Figures 6 and 8)
t
d(TxDBUSon)
Delay TxD to bus active 75 ns
t
d(TxDBUSoff)
Delay TxD to bus inactive 85 ns
t
d(BUSonRxD)
Delay bus active to RxD 24 ns
t
d(BUSoffRxD)
Delay bus inactive to RxD 32 ns
t
pd_dr
Propagation delay TxD to RxD dominant to
recessive transition
50 100 210 ns
t
pd_rd
Propagation delay TxD to RxD recessive
to dominant transition
50 120 210 ns
t
d(stbnm)
Delay standby mode to normal mode 5 11 20
ms
t
wake_filt
Filter time for wakeup via bus
NCV7344 version 0.5 5
ms
NCV7344A version 0.15 1.8
ms
t
dwakerd
Delay to flag wake event
(recessive to dominant transitions)
Valid bus wakeup event 0.5 2.6 6
ms
t
dwakedr
Delay to flag wake event
(dominant to recessive transitions)
Valid bus wakeup event 0.5 2.6 6
ms
t
wake_to
Bus time for wakeup timeout Standby mode 1 10 ms
t
dom(TxD)
TxD dominant time for timeout V
TxD
= Low; Normal mode 1 10 ms
t
Bit(RxD)
Bit time on RxD pin
t
Bit(TxD)
= 500 ns 400 550 ns
t
Bit(TxD)
= 200 ns 120 220 ns
t
Bit(Vi(diff))
Bit time on bus (CANH – CANL pin)
t
Bit(TxD)
= 500 ns 435 530 ns
t
Bit(TxD)
= 200 ns 155 210 ns
Dt
Rec
Receiver timing symmetry
Dt
Rec
=
t
Bit(RxD)
t
Bit(Vi(diff))
t
Bit(TxD)
= 500 ns 65 +40 ns
t
Bit(TxD)
= 200 ns 45 +15 ns
THERMAL SHUTDOWN
T
J(sd)
Shutdown junction temperature Junction temperature rising 160 180 200 °C
9. In the range between VUVD(VCC)(stby) and 4.75 V and from 5.25 V to 6 V the chip is fully functional; some parameters may be outside of
the specification.
10.Values based on design and characterization, not tested in production
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9
MEASUREMENT SETUPS AND DEFINITIONS
TxD
0.3·V
CC
* 0.3·V
CC
*
0.7·V
CC
*
t
bit(TxD)
t
bit(TxD)
0.3·V
CC
*
t
bit(RxD)
RxD
500mV
t
bit(Vi(diff))
t
pd_dr
t
pd_rd
900mV
V
i(diff)
=V
CANH
V
CANL
t
d(TxDBUSon)
t
d(TxDBUSoff)
0.7·V
CC
*
t
d(BUSonRxD)
Figure 6. Transceiver Timing Diagram
*On NCV73443 V
CC
is replaced by V
IO
Edge length below 10 ns
NCV7344
V
CC
GND
2
3
CANH
CANL
6
7
STB
8
RxD
4
TxD
1
100nF
+5 V
15pF
1nF
1nF
Transient
Generator
V
IO
5
Figure 7. Test Circuit for Automotive Transients
Figure 8. Test Circuit for Timing Characteristics
V
CC
GND
2
3
CANH
CANL
5
6
7
R
LT
/2
C
LT
STB
8
RxD
4
TxD
1
2x 30 W
100 pF
100 nF
+5 V
15 pF
NCV7344
V
IO
R
LT
/2
C
1

NCV7344D10R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC HS LP CANFD TRANSC (NC)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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