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NCP3418BMNR2G

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 5
1 Publication Order Number:
NCP3418B/D
NCP3418B
MOSFET Driver with Dual
Outputs for Synchronous
Buck Converters
The NCP3418B is a single Phase 12 V MOSFET gate driver
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. The high−side and
low−side driver is capable of driving a 3000 pF load with a 25 ns
propagation delay and a 20 ns transition time.
With a wide operating voltage range, high or low side MOSFET
gate drive voltage can be optimized for the best efficiency. Internal
adaptive nonoverlap circuitry further reduces switching losses by
preventing simultaneous conduction of both MOSFETs.
The floating top driver design can accommodate VBST voltages as
high as 30 V, with transient voltages as high as 35 V. Both gate outputs
can be driven low by applying a low logic level to the Output Disable
(OD) pin. An Undervoltage Lockout function ensures that both driver
outputs are low when the supply voltage is low, and a Thermal
Shutdown function provides the IC with overtemperature protection.
The NCP3418B is pin−to−pin compatible with Analog Devices
ADP3418 with the following advantages:
Features
• Faster Rise and Fall Times
• Thermal Shutdown for System Protection
• Internal Pulldown Resistor Suppresses Transient Turn On of Either
MOSFET
• Anti Cross−Conduction Protection Circuitry
• Floating Top Driver Accommodates Boost Voltages of up to 30 V
• One Input Signal Controls Both the Upper and Lower Gate Outputs
• Output Disable Control Turns Off Both MOSFETs
• Complies with VRM10.x and VRM11.x Specifications
• Undervoltage Lockout
• Thermal Shutdown
• Thermally Enhanced Package Available
• These are Pb−Free Devices
Device Package Shipping
†
ORDERING INFORMATION
SO−8
(Pb−Free)
2500 Tape & Reel
NCP3418BDR2G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
MARKING
DIAGRAMS
PIN CONNECTIONS
SO−8
D SUFFIX
CASE 751
1
8
DRVLV
CC
18
PGNDOD
SWNIN
DRVHBST
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†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
3418B
ALYW
G
1
8
DFN−10
MN SUFFIX
CASE 485C
DFN−10
(Pb−Free)
3000 Tape & Reel
NCP3418BMNR2G
PGNDV
CC
PGNDOD
SWNIN
DRVHBST
DRVLV
CC
(Top View)
110
3418B
ALYW
G
NCP3418B
http://onsemi.com
2
Figure 1. Block Diagram
8
1
4
7
5
6
2
3
V
CC
DRVH
BST
SWN
DRVL
PGND
OD
IN
TSD
UVLO
V
CC
MONITOR
FALLING
EDGE
DELAY
MONITOR
FALLING
EDGE
DELAY
NON−OVERLAP
TIMERS
MIN DRVL
OFF TIMER
START STOP
PIN DESCRIPTION
SO−8 DFN−10 Symbol Description
1 1 BST Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and SW pins holds
this bootstrap voltage for the high−side MOSFET as it is switched. The recommended capacitor value
is between 100 nF and 1.0 mF. An external diode is required with the NCP3418B.
2 2 IN Logic−Level Input. This pin has primary control of the drive outputs.
3 3 OD Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low.
4 4 V
CC
Input Supply. A 1.0 mF ceramic capacitor should be connected from this pin to PGND.
− 5 V
CC
Input Supply. A 1.0 mF ceramic capacitor should be connected from this pin to PGND.
5 6 DRVL Output drive for the lower MOSFET.
6 7 PGND Power Ground. Should be closely connected to the source of the lower MOSFET.
− 8 PGND Power Ground. Should be closely connected to the source of the lower MOSFET.
7 9 SWN Switch Node. Connect to the source of the upper MOSFET.
8 10 DRVH Output drive for the upper MOSFET.
NCP3418B
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3
MAXIMUM RATINGS
Rating Value Unit
Operating Ambient Temperature, T
A
0 to 85 °C
Operating Junction Temperature, T
J
(Note 1) 0 to 150 °C
Package Thermal Resistance: SO−8
Junction−to−Case, R
q
JC
Junction−to−Ambient, R
q
JA
(2−Layer Board)
Package Thermal Resistance: DFN−10 (Note 2)
Junction−to−Case, R
q
JC
(From die to exposed pad)
Junction−to−Ambient, R
q
JA
45
123
7.5
55
°C/W
°C/W
°C/W
°C/W
Storage Temperature Range, T
S
−65 to 150 °C
Lead Temperature Soldering (10 sec): Reflow (SMD styles only) Pb−Free (Note 3) 260 peak °C
JEDEC Moisture Sensitivity Level SO−8 (260 peak profile) 1 −
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Internally limited by thermal shutdown, 150°C min.
2. 2 layer board, 1 in
2
Cu, 1 oz thickness.
3. 60−180 seconds minimum above 237°C.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
MAXIMUM RATINGS
Pin Symbol Pin Name V
MAX
V
MIN
V
CC
Main Supply Voltage Input 15 V −0.3 V
BST Bootstrap Supply Voltage Input 30 V wrt/PGND
35 V v 50 ns wrt/PGND
15 V wrt/SW
−0.3 V wrt/SW
SW Switching Node
(Bootstrap Supply Return)
30 V −1.0 V DC
−10 V< 200 ns
DRVH High−Side Driver Output BST + 0.3 V
35 V v 50 ns wrt/PGND
15 V wrt/SW
−0.3 V wrt/SW
DRVL Low−Side Driver Output V
CC
+ 0.3 V −0.3 V DC
−2.0 V < 200 ns
IN DRVH and DRVL Control Input V
CC
+ 0.3 V −0.3 V
OD Output Disable V
CC
+ 0.3 V −0.3 V
PGND Ground 0 V 0 V
NOTE: All voltages are with respect to PGND except where noted.
P1-P3P4-P6P7-P8

NCP3418BMNR2G

Mfr. #:
Buy NCP3418BMNR2G
Manufacturer:
ON Semiconductor
Description:
Gate Drivers 12V MOSFET DRIVER
Lifecycle:
New from this manufacturer.
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