SSM2143
REV.
–6–
*The photographs in Figure 17 through Figure 19 were taken at V
S
= ±15 V and T
A
= +25°C, using an external amplifier with a gain of 1000.
SLEW RATE – V/µs
4
16
10
6
8
14
12
TEMPERATURE – °C
7525
50
–50
–25 1000
R = 2k
V = ±15V
L
S
Figure 20. Slew Rate vs. Temperature
TEMPERATURE – °C
75
25
50–50 –25
100
0
INPUT OFFSET VOLTAGE – µV
400
0
300
100
200
V = ±15V
S
Figure 22. Input Offset Voltage vs. Temperature
SUPPLY VOLTAGE – V
0
±20±5 ±15±10
SUPPLY CURRENT– mA
4.0
1.0
2.5
1.5
2.0
3.5
3.0
T
A
= +25°C
Figure 24. Supply Current vs. Supply Voltage
10
90
100
0%
5mV
1ms
5µ V
0V
–5µV
Figure 19. Voltage Noise from 0 kHz to 10 kHz*
TEMPERATURE – °C
75
25 50
–50
–25
100
0
GAIN ERROR – %
0.10
0
0.06
0.02
0.04
0.08
V = ±10V
V = ±15V
R = 0
S
S
IN
Figure 21. Gain Error vs. Temperature
TEMPERATURE – °C
7525
50
–50
–25
100
0
V = ±15V
S
5
0
3
1
2
4
SUPPLY CURRENT – mA
Figure 23. Supply Current vs. Temperature
A
SSM2143
REV.
–7–
APPLICATIONS INFORMATION
The SSM2143 is designed as a balanced differential line re-
ceiver. It uses a high speed, low noise audio amplifier with four
precision thin-film resistors to maintain excellent common-mode
rejection and ultralow THD. Figure 25 shows the basic differen-
tial receiver application where the SSM2143 yields a gain of 1/2.
The placement of the input and feedback resistors can be
switched to achieve a gain of +2, as shown in Figure 26. For
either circuit configuration, the SSM2143 can also be used un-
balanced by grounding one of the inputs. In applications requir-
ing a gain of +1, use the SSM2141.
6
3
5
1
4
2
7
6k
6k
12k
12k
–IN
+IN
–15V
0.1µF
+15V
0.1µF
A = 2
V
SSM2143
V
OUT
6
1
2
4
5
7
12k
12k
6k
6k
–IN
+IN
–15V
0.1µF
V
OUT
+15V
0.1µF
A =
V
1
2
SSM2143
3
+
Figure 25. Standard Config-
uration for Gain of 1/2
CMRR
The internal thin-film resistors are precisely trimmed to achieve
a CMRR of 90 dB. Any imbalances introduced by the external
circuitry will cause a significant reduction in the overall CMRR
performance. For example, a 5 source imbalance will result in
a CMRR of 71 dB at dc. This is also true for any reactive source
impedances that may affect the CMRR over the audio frequency
range. These error sources need to be minimized to maintain
the excellent CMRR.
To quantify the required accuracy of the thin film resistor
matching, the source of CMRR error can be analyzed. A resistor
mismatch can be modelled as shown in Figure 27. By assuming
a tolerance on one of the 12 k resistors of R, the equation for
the common-mode gain becomes:
V
OUT
V
IN
=
6k
6k+12k
6k
12k+∆R
+1
6k
12k+∆R
which reduces to:
V
OUT
V
IN
=
1/3 R
12k+∆R
This gain error leads to a common-mode rejection ratio of:
CMRR =
|A
DM
|
|A
CM
|
18k
R
–IN
+IN
6k
6k
12k + R
12k
V
OUT
CMRR =
18k
R
Figure 27. A Small Mismatch in Resistance Results in a
Large Common-Mode Error
Setting R to 5 results in the CMRR of 71 dB, as stated
above. To achieve the SSM2143’s CMRR of 90 dB, the resistor
mismatch can be at most 0.57 . In other words, to build this
circuit discretely, the resistors would have to be matched to
better than 0.005%!
The following table shows typical resistor accuracies and the
resulting CMRR for a differential amplifier.
% Mismatch CMRR
5% 30 dB
1% 44 dB
0.1% 64 dB
0.005% 90 dB
DC OUTPUT LEVEL ADJUST
The reference node of the SSM2143 is normally connected to
ground. However, it can be used to null out any dc offsets in
the system or to introduce a dc reference level other than
ground. As shown in Figure 28, the reference node needs to be
REFERENCE
OP27
+10V
–10V
6
1
2
3
4
5
7
12k
12k
6k
6k
–IN
+IN
–15V
0.1µF
V
OUT
+15V
0.1µF
SSM2143
Figure 28. A Low Impedance Buffer Is Required to Adjust
the Reference Voltage.
buffered with an op amp to maintain very low impedance to
achieve high CMRR. The same reasoning as above applies such
that the 6 k resistor has to be matched to better than 0.005%
or 0.3 . The op amp maintains very low output impedance
over the entire audio frequency range, as long as its bandwidth
is well above 20 kHz. The reference input can be adjusted over
a ±10 V range. The gain from the reference to the output is
unity so the resulting dc output adjustment range is also ±10 V.
INPUT ERRORS
The main dc input offset error specified for the SSM2143 is the
Input Offset Voltage. The Input Bias Current and Input Offset
Current are not specified as for a normal operational amplifier.
Because the SSM2143 has built-in resistors, any bias current
related errors are converted into offset voltage errors. Thus, the
offset voltage specification is a combination of the amplifier’s
offset voltage plus its offset current times the input impedance.
Figure 26. Reversing the
Resistors Results in a
Gain of 2
Figure 29. SSM2142/SSM2143 Balanced Line Driver/
Receiver System
2
6
5
4
3
8
7
SSM2142
V
IN
SSM2143
+18V
–18V
+18V
0.1µF
0.1µF
–18V
V
OUT
3
7
6
4
1
2
5
ALL CABLE MEASUREMENTS USE
BELDEN CABLE (500').
1
A
SSM2143
REV.
–8–
LINE DRIVER/RECEIVER SYSTEM
The SSM2143 and SSM2142 provide a fully integrated line driver/
receiver system. The SSM2142 is a high performance balanced
line driver IC that converts an unbalanced input into a balanced
output signal. It can drive large capacitive loads on long cables
making it ideal for transmitting balanced audio signals. When com-
bined with an SSM2143 on the receiving end of the cable, the sys-
tem maintains high common-mode rejection and ultralow THD.
The SSM2142 is designed with a gain of +2 and the SSM2143
with a gain of 1/2, providing an overall system gain of unity.
The following data demonstrates the typical performance of the
two parts together, measured on an Audio Precision at the
SSM2143’s output. This configuration was tested with 500 feet
Figure 30. THD+N vs. Frequency of SSM2142/SSM2143
System (V
S
=
±
18 V, V
IN
= 5 V rms, with 80 kHz Filter)
Figure 31. SSM2142/SSM2143 System Headroom–
See Text—(V
S
=
±
18 V, R
L
= 10 k
, 500' Cable)
Figure 32. SSM2142/SSM2143 System
DIM-100 Dynamic Intermodulation
Distortion (V
S
=
±
18 V, R
L
= 10 k
)
of cable between the ICs as well as no cable. The combination
of the two parts results in excellent THD+N and SNR and a noise
floor of typically –105 dB over a 20 Hz to 20 kHz bandwidth.
A comment on SSM2142/SSM2143 system headroom is neces-
sary. Figure 31 shows a maximum signal handling of approximately
±22 dBu, but it must be kept in mind that this is measured be-
tween the SSM2142’s input and SSM2143’s output, which has
been attenuated by one half. Normally, the system would be shown
as actually used in a piece of equipment, whereby the SSM2143 is
at the input and SSM2142 at the output. In this case, the system
could handle differential signals in excess of +24 dBu at the input
and output, which is consistent with headroom requirements of
most professional audio equipment.
Figure 33. SSM2142/SSM2143 System Frequency
Response (V
S
=
±
18 V, V
IN
= 0 dBV, 500' Cable)
10
90
100
0%
5V
10µs
Figure 34. SSM2142/SSM2143 System Large Signal Pulse
Response (V
S
=
±
18 V, R
L
= 10 k
, No Cable)
PRINTED IN U.S.A.
500' CABLE
NO CABLE
500' CABLE
NO CABLE
A

SSM2143PZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio Amplifiers IC -6DB DIFF LINE RECEIVER
Lifecycle:
New from this manufacturer.
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