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74LVCH244ADB-Q100J

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
74LVC_LVCH244A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 13 August 2013 9 of 18
NXP Semiconductors 74LVC244A-Q100; 74LVCH244A-Q100
Quad buffer/line driver; 3-state
11. AC waveforms
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. The input (nAn) to output (nYn) propagation delays
mna171
nAn input
nYn output
t
PLH
t
PHL
GND
V
I
V
M
V
M
V
M
V
M
V
OH
V
OL
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7. 3-state enable and disable times.
mna362
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
V
I
V
OL
V
OH
V
CC
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
V
X
V
Y
1.2 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
1.65 V to 1.95 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.3 V to 2.7 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.7 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
74LVC_LVCH244A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 13 August 2013 10 of 18
NXP Semiconductors 74LVC244A-Q100; 74LVCH244A-Q100
Quad buffer/line driver; 3-state
Test data is given in Table 9.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 8. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae331
V
EXT
V
CC
V
I
V
O
DUT
C
L
R
T
R
L
R
L
G
Table 9. Test data
Supply voltage Input Load V
EXT
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PLZ
, t
PZL
t
PHZ
, t
PZH
1.2 V V
CC
2ns 30pF 1 k open 2 V
CC
GND
1.65 V to 1.95 V V
CC
2ns 30pF 1 k open 2 V
CC
GND
2.3 V to 2.7 V V
CC
2ns 30pF 500 open 2 V
CC
GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
74LVC_LVCH244A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 13 August 2013 11 of 18
NXP Semiconductors 74LVC244A-Q100; 74LVCH244A-Q100
Quad buffer/line driver; 3-state
12. Package outline
Fig 9. Package outline SOT163-1 (SO20)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
99-12-27
03-02-19
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

74LVCH244ADB-Q100J

Mfr. #:
Buy 74LVCH244ADB-Q100J
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers Octal buffer/line driver; 3-state
Lifecycle:
New from this manufacturer.
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