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pin Functions
CA0 (Pin 1): Chip Address Bit 0. Tie this pin to V
CC
, GND
or leave it floating to select an I
2
C slave address for the
part (see Tables 1 and 2).
SCL (Pin 2): Serial Clock Input Pin. Data is shifted into the
SDA pin at the rising edges of the clock. This high impedance
pin requires a pull-up resistor or current source to V
CC
.
SDA (Pin 3): Serial Data Bidirectional Pin. Data is shifted
into the SDA pin and acknowledged by the SDA pin. This
pin is high impedance while data is shifted in. Open-drain
N-channel output during acknowledgment. SDA requires
a pull-up resistor or current source to V
CC
.
GND (Pin 4): Ground.
V
CC
(Pin 5): Supply Voltage Input. 2.7V ≤ V
CC
≤ 5.5V
(LTC2631-L) or 4.5V ≤ V
CC
≤ 5.5V (LTC2631-H). Bypass
to GND with a 0.1µF capacitor.
REF (Pin 6): Reference Voltage Input or Output. When
External Reference mode is selected, REF is an input (0V
≤ V
REF
≤ V
CC
) where the voltage supplied sets the full-
scale voltage. When Internal Reference is selected, the
10ppm/°C 1.25V (LTC2631-L) or 2.048V (LTC2631-H)
internal reference is available at the pin. This output may
be bypassed to GND with up to 10µF (0.33µF is recom-
mended), and must
be buffered when driving external DC
load current.
V
OUT
(Pin 7): DAC Analog Voltage Output.
CA1 (Pin 8, LTC2631-Z): Chip Address Bit 1. Tie this pin
to V
CC
, GND or leave it floating to select an I
2
C slave ad-
dress for the part (see Table 1).
REF_SEL (
Pin 8, LTC2631-M): Selects default Reference
at power up. Tie to V
CC
to select the Internal Reference,
or GND to select an External Reference. After power-up,
the logic state at this pin is ignored and the reference may
be changed only by software command.
