List of figures
MP34DB02
4/17
DocID026103 Rev 2
List of figures
Figure 1: Pin connections ........................................................................................................................... 5
Figure 2: Timing waveforms ....................................................................................................................... 7
Figure 3: Frequency response .................................................................................................................... 8
Figure 4: MP34DB02 electrical connections ............................................................................................. 12
Figure 5: MP34DB02 electrical connections for stereo configuration ....................................................... 12
Figure 6: Recommended soldering profile limits ...................................................................................... 13
Figure 7: RHLGA 4LD 3x4 mm (metal cap) 0.25 mm port hole package outline ..................................... 14
MP34DB02
Pin description
DocID026103 Rev 2
5/17
1 Pin description
Figure 1: Pin connections
Table 2: Pin description
Pin number Pin name Function
1 CLK Synchronization input clock
2 LR Left/right channel selection
3 Vdd Power supply
4 DOUT Left/right PDM data output
5 (ground ring) GND 0 V supply
Acoustic and electrical specifications
6/17
DocID026103 Rev 2
2 Acoustic and electrical specifications
2.1 Acoustic and electrical characteristics
The values listed in the table below are specified for Vdd = 1.8 V, Clock = 2.4 MHz,
T = 25 °C, unless otherwise noted.
Table 3: Acoustic and electrical characteristics
Sym. Parameter Test condition Min. Typ.
(1)
Max. Unit
Vdd Supply voltage
1.64 1.8 3.6 V
Idd
Current consumption in
normal mode
Mean value
(2)
0.65
mA
IddPdn
Current consumption in
power-down mode
(3)
20
µA
Scc Short-circuit current
1
10 mA
AOP Acoustic overload point
120
dBSPL
So Sensitivity at 1 kHz, 1 Pa -29 -26 -23 dBFS
SNR Signal-to-noise ratio
A-weighted at 1 kHz,
1 Pa
62.6
dB
PSR Power supply rejection
100 mVpp square
wave @ 217 Hz,
A-weighted
-86
dBFS
Clock
Input clock frequency
(4)
1 2.4 3.25 MHz
TWK
Wake-up time
(5)
guaranteed by design
10 ms
Top
Operating temperature
range
-40
+85 °C
Notes:
(1)
Typical specifications are not guaranteed.
(2)
No load on DOUT line.
(3)
Input clock in static mode.
(4)
Duty cycle: min = 40% max = 60%
(5)
Time from the first clock edge to valid output data.
Table 4: Distortion specifications
Parameter Test condition Value
Distortion 100 dBSPL (50 Hz - 4 kHz) < 1% THD + N
Distortion 115 dBSPL (1 kHz) < 5% THD + N

MP34DB02TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
MIC MEMS DIGITAL PDM OMNI 4RHLGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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