MAX5385EUT+T Datasheet MAX5385EUT+T, MAX5384EUT+T, MAX5383EUT+T | P7-P9

Detailed Description

The MAX5383/MAX5384/MAX5385 voltage-output, 8-bit

DACs ensure monotonic performance by offering full 8-

bit performance with less than 1LSB integral nonlineari-

ty error and less than 1LSB differential nonlinearity

error. The devices use a simple 3-wire, SPI/QSPI/

MICROWIRE-compatible serial interface that operates

up to 10MHz. They include an internal reference, an

output buffer, and three low-current shutdown modes,

making these devices ideal for low-power, highly inte-

grated applications. Figure 1 shows the devices’ func-

tional diagram.

Analog Section

The MAX5383/MAX5384/MAX5385 employ a current-

steering DAC topology as shown in Figure 2. At the

core of the DAC is a reference voltage-to-current con-

verter (V/I) that generates a reference current. This cur-

rent is mirrored to 255 equally weighted current

sources. DAC switches control the outputs of these cur-

rent mirrors so that only the desired fraction of the total

current-mirror currents is steered to the DAC output.

The current is then converted to a voltage across a

resistor, and this voltage is buffered by the output

buffer amplifier.

Output Voltage

Table 1 shows the relationship between the DAC code

and the analog output voltage. The 8-bit DAC code is

binary unipolar with 1LSB = (V

REF

/256). The MAX5383/

MAX5384 have a full-scale output voltage of (+2V - 1LSB)

and (+4V - 1LSB), set by the internal references. The

MAX5385 has a full-scale output voltage of (0.9

1LSB).

Output Buffer

The DAC voltage output is an internally buffered unity-

gain follower that slews up to ±0.4V/µs. The output can

swing from 0 to full scale. With a 1/4FS to 3/4FS output

transition, the amplifier outputs typically settle to

1/2LSB in less than 5µs when loaded with 10kΩ in par-

allel with 50pF. The buffer amplifiers are stable with any

MAX5383/MAX5384/MAX5385

Low-Cost, Low-Power, 8-Bit DACs with 3-Wire

Serial Interface in SOT23

_______________________________________________________________________________________

Typical Operating Characteristics (continued)

= +3.0V (MAX5383), V

= +5.0V (MAX5384/MAX5385), T

= +25°C, unless otherwise noted.)

s/div

MAX5383

OUTPUT SETTLING

1LSB STEP UP

MAX5383/4/5-22

OUT

20mV/div

AC-COUPLED

0 x 7F TO 0 x 80

3V/div

MAX5383

OUTPUT SETTLING

1LSB STEP DOWN

MAX5383/4/5-23

OUT

20mV/div

AC-COUPLED

s/div

0 x 80 TO 0 x 7F

3V/div

Pin Description

PIN NAME DESCRIPTION

1 OUT DAC Voltage Output

2 GND Ground

Power-Supply Input

4 DIN Serial Data Input

5 SCLK Serial Clock Input

6 CS Chip-Select Input

combination of resistive loads >10kΩ and capacitive

loads <50pF.

Power-On Reset

The MAX5383/MAX5384/MAX5385 have a power-on

reset circuit to set the DAC’s output to 0 when V

first applied or when V

dips below 1.7V (typ). This

ensures that unwanted DAC output voltages will not

occur immediately following a system startup, such as

after a loss of power. The output glitch on startup is typ-

ically less than 50mV.

Shutdown Mode

The MAX5383/MAX5384/MAX5385 include three soft-

ware-controlled shutdown modes that reduce the supply

current to <1µA. All internal circuitry is disabled, and a

known impedance is placed from OUT to GND to

ensure 0V while in shutdown. Table 2 details the three

shutdown modes of operation.

Digital Section

3-Wire Serial Interface

The MAX5383/MAX5384/MAX5385s’ digital interface is

a standard 3-wire connection compatible with

SPI/QSPI/MICROWIRE interfaces. The chip-select input

(CS) frames the serial data loading at the data-input pin

(DIN). Immediately following CS’s high-to-low transition,

the data is shifted synchronously and latched into the

input register on the rising edge of the serial clock input

(SCLK). After 16 bits have been loaded into the serial

MAX5383/MAX5384/MAX5385

Low-Cost, Low-Power, 8-Bit DACs with 3-Wire

Serial Interface in SOT23

8 _______________________________________________________________________________________

REF

CONTROL LOGIC

DATA LATCH

GND

OUT

CURRENT-STEERING

DAC

SERIAL INPUT REGISTERSCLK

DIN

255

MAX5383

MAX5384

MAX5385

Figure 1. Functional Diagram

SW1 SW2 SW255

OUT

REF

Figure 2. Current-Steering DAC Topology

OUTPUT VOLTAGE

DAC CODE

[D11–D4]

MAX5383 MAX5384 MAX5385

1111 1111

(255/256)

0.9

× V

(255/256)

1000 0000 1V 2V 0.9 × V

/ 2

0000 0001 7.8mV 15.6mV 0.9 × V

/ 256

0000 0000 0 0 0

Table 1. Unipolar Code Output Voltage

input register, it transfers its contents to the DAC latch

on CS’s low-to-high transition (Figure 3). Note that if CS

is not kept low during the entire 16 SCLK cycles, data

will be corrupted. In this case, reload the DAC latch

with a new 16-bit word. The serial clock (SCLK) can

idle either high or low between transitions. Figure 4

shows the complete 3-wire serial interface transmis-

sion. Table 3 lists serial interface mapping.

Applications Information

Device Powered by an External Reference

Since the MAX5385 generates an output voltage pro-

portional to V

, a noisy power supply will affect the

accuracy of the on-board reference, thereby affecting

the overall accuracy of the DAC. The circuit in Figure 5

rejects this power-supply noise by powering the device

directly with a precision voltage reference, improving

overall system accuracy. The MAX6103 (+3V, 75ppm)

or the MAX6105 (+5V, 75ppm) precision voltage refer-

ences are ideal choices due to the low power require-

ments of the MAX5385. This solution is also useful

when the required full-scale output voltage is different

from the available supply voltages.

Digital Inputs and Interface Logic

The digital interface for the 8-bit DAC is based on a

3-wire standard that is compatible with SPI, QSPI, and

MICROWIRE interfaces. The three digital inputs (CS, DIN,

and SCLK) load the digital input serially into the DAC.

All the digital inputs include Schmitt-trigger buffers to

accept slow-transition interfaces. This means that opto-

couplers can interface directly to the MAX5383/

MAX5384/MAX5385 without additional external logic.

The digital inputs are compatible with CMOS logic levels

and can be driven with voltages up to +5.5V regardless

of the supply voltage.

Power-Supply Bypassing and Layout

Careful PC board layout is important for best system

performance. To reduce crosstalk and noise injection,

keep analog and digital signals separate. To ensure

that the ground return from GND to the supply ground

is short and low impedance, a ground plane is recom-

mended. Bypass V

with a 0.1µF capacitor to ground

as close as possible to the device. If the supply is

excessively noisy, connect a 10Ω resistor in series with

the supply and V

and add additional capacitance.

MAX5383/MAX5384/MAX5385

Low-Cost, Low-Power, 8-Bit DACs with 3-Wire

Serial Interface in SOT23

_______________________________________________________________________________________ 9

Table 3. Serial Interface Mapping

= Don’t care

16-BIT SERIAL WORD

ANALOG

MSB LSB OUTPUT

FUNCTION

XX00 0000 0000 XXXX 0V Normal operation

XX00 1111 1111 XXXX

REF

× (255/256)

Normal operation

XX00 0000 0001 XXXX V

REF

× (1/256) Normal operation

XX00 1000 0000 XXXX V

REF

× (128/256) Normal operation

XX01 XXXX XXXX XXXX 0V

Shutdown,

1kΩ to GND

XX10 XXXX XXXX XXXX 0V

Shutdown,

100kΩ to GND

XX11 XXXX XXXX XXXX 0V

Shutdown,

1MΩ to GND

Table 2. Shutdown Modes

DAC CODE

[D13 AND D12]

MODE

OUTPUT RESISTANCE TO

GROUND (Ω)

MAXIMUM SUPPLY

CURRENT (µA)

01 Shutdown 1k 1

10 Shutdown 100k 1

11 Shutdown 1M 1

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15

MAX5385EUT+T

Mfr. #:

Buy MAX5385EUT+T

Manufacturer:

Maxim Integrated

Description:

Digital to Analog Converters - DAC 8-Bit Precision DAC

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MAX5385EUT+T

MAX5385EUT+T

Products related to this Datasheet