REV. A
–3–
OP471
OP471E OP471F OP471G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage V
OS
0.3 1.1 0.6 2.0 1.2 2.5 mV
Average Input TCV
OS
14 27 4 mV/∞C
Offset Voltage Drift
Input Offset Current los V
CM
= 0 V 5 20 8 40 20 50 nA
Input Bias Current I
B
V
CM
= 0 V 13 50 2570 4075 nA
Large-Signal V
O
= ± 10 V
Voltage Gain Avo R
L
= 10 kW 375 600 200 400 200 400 V/mV
R
L
= 2 kW 250 400 125 200 125 200
Input Voltage Range* IVR ± 11 ± 12 ± 11 ± 12 ± 11 ± 12 V
Output Voltage Swing V
O
R
L
≥
2 kW±12 ± 13 ± 12 ± 13 ± 12 ± 13 V
Common-Mode CMR V
CM
= ± 11 V 100 115 90 110 90 110 dB
Rejection
Power Supply PSRR V
S
= ± 4.5 V to ± 18 V 3.2 10 18 31.6 18 31.6 mV/V
Rejection Ratio
Supply Current
(All Amplifiers) I
SY
No Load 9.3 11 9.3 11 9.3 11 mA
*Guaranteed by CMR test.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . ± 1.0 V
Differential Input Current
2
. . . . . . . . . . . . . . . . . . . . ± 25 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous
Storage Temperature Range
P, Y-Package . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300∞C
Junction Temperature (T
i
) . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
OP471E, OP471F . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C
OP471G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
NOTES
1
Absolute Maximum Ratings apply to packaged parts, unless otherwise noted.
2
The OP471’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds ± 1.0 V, the input current should be limited to ± 25 mA.
Package Type
JA
*
JC
Unit
14-Lead Hermetic DIP(Y) 94 10 ∞C/W
14-Lead Plastic DIP(P) 76 33 ∞C/W
16-Lead SOIC (S) 88 23 ∞C/W
*
JA
is specified for worst-case mounting conditions, i.e.,
JA
is specified for device
in socket for TO, CERDIP, PDIP packages;
JA
is specified for device soldered to
printed circuit board for SO packages.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP471 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
T
A
= 25∞C Package Options Operating
V
OS
MAX Temperature
(mV) 14-Lead CERDIP Plastic Range
800 OP471EY IND
1,500 OP471FY* IND
1,800 OP471GP XIND
1,800 OP471GS XIND
*Not for new design. Obsolete April 2002.
For military processed devices, please refer to the standard
microcircuit drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
5962-88565022A - OP471ARCMDA
5962-88565023A - OP471ATCMDA
5962-8856502CA - OP471AYMDA
ELECTRICAL CHARACTERISTICS
(V
s
= ±15 V, –25
C £ T
A
£ 85C for OP471E/F, –40C £ T
A
£ 85 for OP471G,
unless otherwise noted.)
