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Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Temperature Under Bias 55 to +125 C
Storage Temperature 65 to +150 C
Voltage on Any Pin with Respect to V
SS
(Notes 1, 2) 2.0 to +V
CC
+ 2.0 V
V
CC
with Respect to Ground 2.0 to +7.0 V
Package Power Dissipation Capability (T
A
= 25C) 1.0 W
Lead Soldering Temperature (10 s) 300 C
Wiper Current 12 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is V
CC
+0.5 V, which may overshoot to V
CC
+2.0 V for periods of less than 20 ns.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1 V to V
CC
+1 V.
Table 3. RECOMMENDED OPERATING CONDITIONS
Parameters Ratings Units
V
CC
+2.5 to +6 V
Industrial Temperature 40 to +85 C
Table 4. POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Test Conditions Min Typ Max Units
R
POT
Potentiometer Resistance (00) 100
kW
R
POT
Potentiometer Resistance (50) 50
kW
R
POT
Potentiometer Resistance (10) 10
kW
R
POT
Potentiometer Resistance (2.5) 2.5
kW
Potentiometer Resistance Tolerance 20 %
R
POT
Matching 1 %
Power Rating 25C, each pot 50 mW
I
W
Wiper Current 6 mA
R
W
Wiper Resistance I
W
= 3 mA @ V
CC
= 3 V 300
W
R
W
Wiper Resistance I
W
= 3 mA @ V
CC
= 5 V 80 150
W
V
TERM
Voltage on any R
H
or R
L
Pin V
SS
= 0 V GND V
CC
V
Resolution 1.6 %
Absolute Linearity (Note 4) R
W(n)(actual)
R
(n)(expected)
(Note 7)
1 LSB
(Note 6)
Relative Linearity (Note 5) R
W(n+1)
[R
W(n)
+
LSB
]
(Note 7)
0.2 LSB
(Note 6)
TC
RPOT
Temperature Coefficient of R
POT
(Note 3) 300 ppm/C
TC
RATIO
Ratiometric Temp. Coefficient (Note 3) 20 ppm/C
C
H
/C
L
/C
W
Potentiometer Capacitances (Note 3) 10/10/25 pF
fc Frequency Response
R
POT
= 50 kW (Note 3)
0.4 MHz
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
5. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer.
It is a measure of the error in step size.
6. LSB = R
TOT
/ 63 or (R
H
R
L
) / 63, single pot.
7. n = 0, 1, 2, ..., 63
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Table 5. D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Test Conditions Min Max Units
I
CC
Power Supply Current f
SCL
= 400 kHz 1 mA
I
SB
Standby Current (V
CC
= 5 V) V
IN
= GND or V
CC
, SDA Open 1
mA
I
LI
Input Leakage Current V
IN
= GND to V
CC
10
mA
I
LO
Output Leakage Current V
OUT
= GND to V
CC
10
mA
V
IL
Input Low Voltage 1 V
CC
x 0.3 V
V
IH
Input High Voltage V
CC
x 0.7 V
CC
+ 1.0 V
V
OL1
Output Low Voltage (V
CC
= 3 V) I
OL
= 3 mA 0.4 V
Table 6. CAPACITANCE (Note 8) (T
A
= 25C, f = 1.0 MHz, V
CC
= 5 V)
Symbol Test Conditions Max Units
C
I/O
Input/Output Capacitance (SDA) V
I/O
= 0 V 8 pF
C
IN
Input Capacitance (A0, A1, A2, A3, SCL, WP) V
IN
= 0 V 6 pF
8. This parameter is tested initially and after a design or process change that affects the parameter.
Table 7. A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter Min Typ Max Units
f
SCL
Clock Frequency 400 kHz
T
I
(Note 10) Noise Suppression Time Constant at SCL, SDA Inputs 50 ns
t
AA
SLC Low to SDA Data Out and ACK Out 0.9
ms
t
BUF
(Note 10) Time the bus must be free before a new transmission can start 1.2
ms
t
HD:STA
Start Condition Hold Time 0.6
ms
t
LOW
Clock Low Period 1.2
ms
t
HIGH
Clock High Period 0.6
ms
t
SU:STA
Start Condition SetupTime (for a Repeated Start Condition) 0.6
ms
t
HD:DAT
Data in Hold Time 0 ns
t
SU:DAT
Data in Setup Time 100 ns
t
R
(Note 10) SDA and SCL Rise Time 0.3
ms
t
F
(Note 10) SDA and SCL Fall Time 300 ns
t
SU:STO
Stop Condition Setup Time 0.6
ms
t
DH
Data Out Hold Time 50 ns
Table 8. POWER UP TIMING (Note 10)
Symbol
Parameter Max Units
t
PUR
Power-up to Read Operation 1 ms
t
PUW
Power-up to Write Operation 1 ms
Table 9. WRITE CYCLE LIMITS (Note 9)
Symbol
Parameter Max Units
t
WR
Write Cycle Time 5 ms
9. The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
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Table 10. RELIABILITY CHARACTERISTICS
Symbol Parameter Reference Test Method Min Max Units
N
END
(Note 10) Endurance MILSTD883, Test Method 1033 1,000,000 Cycles/Byte
T
DR
(Note 10) Data Retention MILSTD883, Test Method 1008 100 Years
V
ZAP
(Note 10) ESD Susceptibility MILSTD883, Test Method 3015 2000 V
I
LTH
(Notes 10, 11) Latch-up JEDEC Standard 17 100 mA
10.This parameter is tested initially and after a design or process change that affects the parameter.
11. t
PUR
and t
PUW
are delays required from the time V
CC
is stable until the specified operation can be initiated.
Figure 2. Bus Timing
SCL
SDA IN
SDA OUT
Figure 3. Write Cycle Timing
STOP
CONDITION
START
CONDITION
ADDRESS
ACK8TH BIT
BYTE n
SCL
SDA
Figure 4. Start/Stop Timing
START CONDITION
SDA
STOP CONDITION
SCL
t
SU:STO
t
BUF
t
DH
t
SU:DAT
t
R
t
LOW
t
LOW
t
HD:DAT
t
HIGH
t
F
t
HD:STA
t
SU:STA
t
AA
t
WR

CAT5409YI-00-T2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs DPP NV QUAD 64 TAPS I2C
Lifecycle:
New from this manufacturer.
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