LTC3521
10
3521fb
For more information www.linear.com/LTC3521
operaTion
The LTC3521 combines dual synchronous buck DC/DC
converters and a 4-switch buck-boost DC/DC converter
in a 4mm × 4mm QFN package and a 20-pin thermally
enhanced TSSOP package. The buck-boost converter
utilizes a proprietary switching algorithm which allows its
output voltage to be regulated above, below or equal to
the input voltage. The buck converters provide a high ef
-
ficiency lower
voltage output and support 100% duty cycle
operation to extend battery life. In Burst Mode operation,
the total quiescent current for the LTC3521 is reduced to
30μA. All three converters are synchronized to the same
internal 1.1MHz oscillator.
BUCK CONVERTER OPERATION
PWM Mode Operation
When the PWM pin is held high, the LTC3521 buck con
-
verters use
a constant-frequency, current mode control
ar
chitecture. Both the main (P-channel MOSFET) and
synchronous rectifier (N-channel MOSFET) switches
are internal. At the start of each oscillator cycle, the
P-channel switch is turned on and remains on until the
current waveform with superimposed slope compensation
ramp exceeds the error amplifier output. At this point,
the synchronous rectifier is turned on and remains on
until the inductor current falls to zero or a new switching
cycle
is initiated. As a result, the buck converters operate
with discontinuous inductor current at light loads, which
improves efficiency. At extremely light loads, the minimum
on-time of the main switch will be reached and the buck
converters will begin turning off for multiple cycles in
order to maintain regulation.
Burst Mode Operation
When the PWM pin is forced low, the buck converters will
automatically transition between Burst Mode operation
at sufficiently light loads (below approximately 15mA)
and PWM mode at heavier loads. Burst Mode entry is
determined by the peak inductor current. Therefore,
the load current at which Burst Mode operation will be
entered depends on the input voltage, the output voltage
and the inductor value. Typical curves for Burst Mode
entry threshold are provided in the Typical Performance
Characteristics section of this data sheet. In dropout and
near dropout conditions, Burst Mode operation is disabled.
Dropout Operation
As the input voltage decreases to a value approaching the
output regulation voltage, the duty cycle increases toward
the maximum on-time. Further reduction of the supply
voltage will force the main switch to remain on for more
than one cycle until 100% duty cycle operation is reached
where the main switch remains
on continuously. In this
dropout state, the output will be determined by the input
voltage less the resistive voltage drop across the main
switch and series resistance of the inductor.
Slope Compensation
Current mode control requires the use of slope compensa
-
tion to prevent subharmonic oscillations in the inductor
current at high duty cycle operation. This is accomplished
internally on the LTC3521 through the addition of a com
-
pensating ramp to the current sense signal. In some current
mode ICs, current limiting is performed by clamping the
error amplifier voltage to a fixed maximum. This leads to a
reduced output current capability at low step-down ratios.
In contrast, the LTC3521 performs current limiting prior
to addition of the slope compensation ramp and therefore
achieves a peak inductor current limit that is independent
of duty cycle.
Short-Circuit Protection
When the output is shorted to ground, the error amplifier
will saturate high and the P-channel MOSFET switch will
turn on at the start of each cycle and remain on until the
current limit trips. During this minimum on-time, the in
-
ductor current
will increase rapidly and will decrease very
slowly during the remainder of the period due to the very
small
reverse voltage produced by a hard output short.
To eliminate the possibility of inductor current runaway in
this situation, the buck converter switching frequency is
reduced to 250kHz when the voltage on the buck FB pin falls
below 0.25V. The buck soft-start circuit is reset when the
buck FB pin falls below 0.25V to provide a smooth restart
once the short-circuit condition at the output voltage is
no longer present. Additionally, the PMOS current limit
is decreased from 1050mA to 700mA when the voltage
on the buck FB pin falls below 0.25V.
