OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

HCPL-4100-300E

P1-P3P4-P6P7-P9P10-P12
7
Notes:
1. Derate linearly above 55°C free air temperature at a rate of 3.8 mW/°C. Proper application of the derating factors will prevent IC junction
temperatures from exceeding 125°C for ambient temperatures up to 85°C.
2. Derate linearly above a free-air temperature of 70°C at a rate of 2.3 mW/°C. A signicant amount of power may be dissipated in the HCPL-4100
output circuit during the transition from the SPACE state to the MARK state when driving a data line or capacitive load (C
OUT
). The average power
dissipation during the transition can be estimated from the following equation which assumes a linear discharge of a capacitive load: P = I
SC
(V
SO
+ V
MO
)/2, where V
SO
is the output voltage in the SPACE state. The duration of this transition can be estimated as t = C
OUT
(V
SO
- V
MO
)/I
SC
. For typical
applications driving twisted pair data lines with NRZ data as shown in Figure 12, the transition time will be less than 10% of one bit time.
3. Derate linearly above 55°C free-air temperature at a rate of 5.1 mW/°C.
4. The maximum current that will ow into the output in the mark state (I
SC
) is internally limited to protect the device. The duration of the output
short circuit shall not exceed 10 ms.
5. The device is considered a two terminal device, pins 1, 2, 3, and 4 are connected together, and pins 5, 6, 7, and 8 are connected together.
6. The t
PLH
propagation delay is measured from the 1.3 volt level on the leading edge of the input pulse to the 10 mA level on the leading edge of
the output pulse.
7. The t
PHL
propagation delay is measured from the 1.3 volt level on the trailing edge of the input pulse to the 10 mA level on the trailing edge of
the output pulse.
8. The rise time, t
r
, is measured from the 10% to the 90% level on the rising edge of the output current pulse.
9. The fall time, t
f
, is measured from the 90% to the 10% level on the falling edge of the output current pulse.
10. Common mode transient immunity in the logic high level is the maximum (positive) dV
CM
/dt on the leading edge of the common mode pulse,
V
CM
, that can be sustained with the output in a Mark (“H”) state (i.e., I
O
> 12 mA).
11. Common mode transient immunity in the logic low level is the maximum (positive) dV
CM
/dt on the leading edge of the common mode pulse,
V
CM
, that can be sustained with the output in a Space (“L”) state (i.e., I
O
< 3 mA).
12. Use of a 0.1 μF bypass capacitor connected between pins 5 and 8 is recommended.
13. In accordance with UL 1577, each optocoupler is momentary withstand proof tested by applying an insulation test voltage ≥ 4500 V rms for 1
second (leakage detection current limit, I
i-o
≤ 5 μA).
Figure 3. Typical Mark State Output Voltage vs.
Temperature.
Figure 4. Typical Output Voltage vs. Loop Cur-
rent.
Figure 5. Typical Space State Output Current vs.
Temperature.
V
O
– OUTPUT VOLTAGE – V
-40
1.6
1.2
T
A
– TEMPERATURE – °C
060
1.8
1.4
-20 20 40
2.0
2.2
2.4
2.6
2.8
3.0
80 100
I
O
20 mA
12 mA
2 mA
V
CC
= 5 V
V
I
= 2 V
V
O
– OUTPUT VOLTAGE – V
0
1.0
0
I
O
– OUTPUT CURRENT – mA
10 20
1.5
0.5
515
2.0
2.5
3.0
3.5
25 30
V
CC
= 5 V
V
I
= 2 V
T
A
= 25 °C
I
S
– SPACE CURRENT – mA
-40
0.8
0.6
T
A
– TEMPERATURE – °C
060
0.9
0.7
-20 20 40
1.0
1.1
1.2
1.3
80 100
V
O
27 V
20 V
V
CC
= 5 V
V
I
= 0.8 V
8
t
p
– PROPAGATION DELAY – μs
-40
0.2
0
T
A
– TEMPERATURE – °C
060
0.3
0.1
-20 20 40
0.4
0.5
0.6
80 100
t
PLH
C
O
= 1000 pF
C
L
= 15 pF
V
CC
= 5 V
I
O
= 20 mA
t
PHL
Figure 6. Test Circuit for t
PLH
, t
PHL
, t
r
, and t
f
. Figure 7. Waveforms for t
PLH
, t
PHL
, t
r
, and t
f
.
Figure 8. Typical Propagation Delay vs. Tem-
perature.
Figure 9. Typical Rise, Fall Times vs. Tempera-
ture.
t
r
, t
f
– RISE AND FALL TIMES – ns
-40
20
0
T
A
– TEMPERATURE – °C
060
30
10
-20 20 40
40
50
60
70
80 100
t
f
V
CC
= 5 V
C
OUT
= 1000 pF
C
L
= 15 pF
I
O
= 20 mA
t
r
Figure 10. Test Circuit for Common Mode Transient Immunity. Figure 11. Typical Waveforms for Common Mode Transient
Immunity.
9
Applications
Data transfer between equipment which employs current
loop circuits can be accomplished via one of three congu-
rations: simplex, half duplex or full duplex communication.
With these congurations, point-to-point and multidrop
arrange ments are possible. The appropriate conguration
to use depends upon data rate, number of stations, number
and length of lines, direction of data ow, protocol, current
source location and voltage compliance value, etc.
Simplex
The simplex conguration, whether point to point or
multi drop, gives unidirectional data ow from transmit-
ter to trans mitter(s). This is the simplest conguration for
use in long line length (two wire), moderate data rate, and
low current source compliance level applications. A block
diagram of simplex point to point arrangement is given in
Figure 12 for the HCPL-4100 transmitter optocoupler.
Major factors which limit maxi mum data rate performance
for a simplex loop are the location and compliance volt-
age of the loop current source as well as the total line
capacitance. Application of the HCPL-4100 transmitter
in a simplex loop necessitates thtat a non-isolated active
receiver (containing current source) be used at the opposite
end of the current loop. With long line length, large line
capacitance will need to be charged to the compliance
voltage level of the current source before the receiver
loop current decreases to zero. This eect limits upper data
rate performance. Slower data rates will occur with larger
compliance voltage levels. The maximum compliance level
is determined by the transmitter breakdown characteristic.
In addition, adequate compliance of the current source
must be available for voltage drops across station(s) dur-
ing the MARK state in multidrop applications for long
line lengths.
Figure 12. Simplex Point to Point Current Loop System Conguration.
In a simplex multidrop applica tion with multiple HCPL-
4100 transmitters and one non-isolated active receiver,
priority of transmitters must be established.
A recommended non-isolated active receiver circuit which
can be used with the HCPL-4100 in point-to-point or in
multidrop 20 mA current loop applications is given in Figure
13. This non-isolated active receiver current threshold must
be chosen properly in order to provide adequate noise
immunity as well as not to detect SPACE state current (bias
current) of the HCPL-4100 transmitter. The receiver input
threshold current is Vth/Rth 10 mA. A simple transistor
current source provides a nominal 20 mA loop current over
a V
CC
compliance range of 6 V dc to 27 V dc. A resistor can
be used in place of the constant current source for simple
applications where the wire loop distance and number
of stations on the loop are xed. A minimum transmitter
output load capac itance of 1000 pF is required between
pins 3 and 4 to ensure absolute stability.
Length of current loop (one direction) versus minimum
required DC supply voltage, V
CC
, of the circuit in Figure 13
is graphically illustrated in Figure 14. Multidrop congura-
tions will require larger V
CC
than Figure 14 predicts in order
to account for additional station terminal voltage drops.
Typical data rate performance versus distance is illustrated
in Figure 15 for the combination of a non-isolated active
receiver and HCPL-4100 optically coupled current loop
transmitter shown in Figure 13. Curves are shown for
P1-P3P4-P6P7-P9P10-P12

HCPL-4100-300E

Mfr. #:
Buy HCPL-4100-300E
Manufacturer:
Broadcom / Avago
Description:
Logic Output Optocouplers 20mA Current Loop
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet