© 2014 Exar Corporation
XR21B1421
7 / 50 exar.com/XR21B1421
Rev 1B
28-pin QFN
Pin No. Pin Name Type Description
1 GPIO3/RS485 I/O General purpose I/O, or auto RS-485 half-duplex enable. Defaults to active high push-pull output
Auto RS-485 half-duplex enable.
2 GPIO0/CLK I/O General purpose I/O, or clock or pulse output. Defaults to GPIO input with internal pull-up. See
“GET / SET_GPIO_CONFIG” on page 28 and “GET / SET_PIN_CONFIG” on page 41.
3 GND PWR Power supply common, ground.
4 USBD+ I/O USB port differential data positive input. This pin has internal pull-up resistor compliant to USB
2.0 specification. The ESD protection on this pin is +/-15 kV HBM.
5 USBD- I/O USB port differential data negative input. The ESD protection on this pin is +/-15 kV HBM.
6 VCC PWR 3.3V power to the device, or 3.3V power output from the device when 5V power is supplied to
VCC_REG pin. 3.3V output power may source up to 200 mA maximum and should be decoupled
by minimum of 4.7 uF ceramic capacitor.
7 VCC_REG PWR 5V or 3.3V power to the device. In bus-powered mode, connect VBUS power from the USB host
to this pin and to the VBUS_SENSE pin. See Figure 1. In self-powered mode, connect on board
5V or 3.3V source to this pin and VBUS from the USB host to the VBUS_SENSE pin. See
Figure 2 and Figure 3.
8 VBUS_SENSE I Must be connected to VBUS power from the USB host PC. This pin is used to disable the internal
pull-up resistor on the USBD+ signal when VBUS is not present in self-powered mode.
9 RESET# I/O OD Active low open drain output. Asserted at power on or any time device is reset by either register
or USB bus reset. As an input, must be asserted for at least 15 us to force a device reset. Reset
pulse width input of shorter than 15 us will have unknown effects. A weak internal pull-up resistor
provides noise immunity if left unconnected.
10 GPIO9/DSR# I/O General purpose I/O, or UART Data-Set-Ready input (active low). Defaults to GPIO push-pull
output. See “Automatic DTR/DSR Hardware Flow Control” on page 16.
11 USB_STAT2 OD This pin has the same functionality as the USB_STAT1 pin. However, the default output for this
pin is active low polarity, asserted whenever the XR21B1421 is placed into a suspended state.
This default may be changed via the PIN_CFG_USB_STAT2 register.
12 USB_STAT1 OD The USB_STAT1 output pin may be used to indicate any of three USB status conditions:
1. USB_STAT1 is asserted when the USB host asserts USB reset.
2. USB_STAT1 is asserted when the USB host PC places the XR21B1421 device into the sus-
pend state.
3. USB_STAT1 is asserted when it is not safe to draw the amount of current requested in the
Device Maximum Power field of the Configuration Descriptor.
a. For a low power device (<= 1 unit load or 100 mA, bMaxPower <= 0x32), USB_STAT1 will be
asserted when the USB UART is in the suspend mode.
b. For a high power device (bMaxPower > 0x32), USB_STAT1 will be asserted when the USB
UART is in the suspend mode or when it is not yet configured.
The assertion polarity and status condition are selectable via the PIN_CFG_STAT1 register. The
USB_STAT pin will be de-asserted whenever the selected condition(s) is / are not met. The
default output for this pin is active high polarity, asserted whenever the XR21B1421 is placed into
a suspended state.
13 NC No Connect
14 NC No Connect
15 TEST# Test mode. Must be left open or pulled high to VCC for normal operation.
