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CY2XP311ZXI

P1-P3P4-P6P7-P9P10-P12P13-P14
CY2XP311
Document Number: 001-59931 Rev. *E Page 4 of 14
Absolute Maximum Conditions
Parameter Description Conditions Min Max Unit
V
DD
Supply voltage – –0.5 4.4 V
V
IN
[1]
Input voltage, DC Relative to V
SS
–0.5 V
DD
+ 0.5 V
T
S
Temperature, storage Non operating –65 150 C
T
J
Temperature, junction – – 135 C
ESD
HBM
ESD protection, human body
model
JEDEC STD 22-A114-B 2000 – V
UL–94 Flammability rating At 1/8 in. V–0
JA
[2]
Thermal resistance, junction to
ambient
0 m/s airflow 100 C/W
1 m/s airflow 91
2.5 m/s airflow 87
Operating Conditions
Parameter Description Min Max Unit
V
DD
3.3 V supply voltage 3.135 3.465 V
2.5 V supply voltage 2.375 2.625 V
T
A
Ambient temperature, commercial 0 70 C
Ambient temperature, industrial –40 85 C
T
PU
Power up time for all V
DD
to reach minimum specified voltage (ensure power ramps
is monotonic)
0.05 500 ms
CY2XP311
Document Number: 001-59931 Rev. *E Page 5 of 14
DC Electrical Characteristics
Parameter Description Test Conditions Min Typ Max Unit
I
DD
Operating supply current with
output unterminated
V
DD
= 3.465 V, OE = V
DD
,
output unterminated
– – 125 mA
V
DD
= 2.625 V, OE = V
DD
,
output unterminated
– – 120 mA
I
DDT
Operating supply current with
output terminated
V
DD
= 3.465 V, OE = V
DD
,
output terminated
– – 150 mA
V
DD
= 2.625 V, OE = V
DD
,
output terminated
– – 145 mA
V
OH
LVPECL output high voltage V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
V
DD
– 1.15 – V
DD
– 0.75 V
V
OL
LVPECL output low voltage V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
V
DD
– 2.0 – V
DD
– 1.625 V
V
OD1
LVPECL peak-to-peak output
voltage swing
V
DD
= 3.3 V or 2.5 V,
R
TERM
= 50 to V
DD
– 2.0 V
600 – 1000 mV
V
OD2
LVPECL output voltage swing
(V
OH
– V
OL
)
V
DD
= 2.5 V,
R
TERM
= 50 to V
DD
– 1.5 V
500 – 1000 mV
V
OCM
LVPECL output common mode
voltage (V
OH
+ V
OL
)/2
V
DD
= 2.5 V,
R
TERM
= 50 to V
DD
– 1.5 V
1.2 – – V
I
OZ
LVPECL output leakage current Output off, OE = V
SS
–35 – 35 A
V
IH
Input high voltage, OE Pin – 0.7 × V
DD
–V
DD
+ 0.3 V
V
IL
Input low voltage, OE Pin – –0.3 – 0.3 × V
DD
V
I
IH
Input high current, OE Pin OE = V
DD
––115µA
I
IL
Input low current, OE Pin OE = V
SS
–50 – – µA
C
IN
[3]
Input capacitance, OE Pin – – 15 – pF
C
INX
[3]
Pin capacitance, XIN & XOUT – – 4.5 – pF
Notes
3. Not 100% tested, guaranteed by design and characterization.
CY2XP311
Document Number: 001-59931 Rev. *E Page 6 of 14
AC Electrical Characteristics
Parameter
[4]
Description Conditions Min Typ Max Unit
F
OUT
Output frequency – 312.5 – MHz
T
R
, T
F
[5]
Output rise or fall time 20% to 80% of full output swing – 0.5 1.0 ns
T
Jitter()
[6]
RMS phase jitter (random) 312.5 MHz, (1.875 to 20 MHz) – 0.3 – ps
T
DC
[7]
Output duty cycle Measured at zero crossing point 45 – 55 %
T
OHZ
Output disable time Time from falling edge on OE to
stopped outputs (Asynchronous)
– – 100 ns
T
OE
Output enable time Time from rising edge on OE to
outputs at a valid frequency
(Asynchronous)
– – 100 ns
T
LOCK
Startup time Time for CLK to reach valid
frequency measured from the time
V
DD
= V
DD
(min.)
– – 5 ms
Recommended Crystal Specifications
Parameter
[8]
Description Min Max Unit
Mode Mode of Oscillation Fundamental –
F Frequency 25 25 MHz
ESR Equivalent Series Resistance – 50
C
S
Shunt Capacitance – 7 pF
Notes
4. Not 100% tested, guaranteed by design and characterization.
5. Refer to Figure 5 on page 7.
6. Refer to Figure 6 on page 7.
7. Refer to Figure 7 on page 8.
8. Characterized using an 18 pF parallel resonant crystal.
P1-P3P4-P6P7-P9P10-P12P13-P14

CY2XP311ZXI

Mfr. #:
Buy CY2XP311ZXI
Manufacturer:
Cypress Semiconductor
Description:
Phase Locked Loops - PLL 312.5 MHz LVPECL CLOCK GENERATOR
Lifecycle:
New from this manufacturer.
Delivery:
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