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OR4E6 Evaluation Board Tutorial
Overview
This tutorial will assist first-time users of the ORCA OR4E FPGA how to use the evaluation board to understand the device
features as well as the capabilities of the evaluation board. To use the tutorial, the user must have an installed copy of
ORCA Foundry 2001 software and an understanding of the ORCA Device Programming Download Cable which is
described in the Lattice Semiconductor technical note TN1009. Users should also reference the OR4E-680PBGAM
Evaluation Board Users Manual.
The tutorial and the supporting design files can be downloaded from the design tools section of the Lattice web site at
http://www.latticesemi.com. The tutorial design was created for use as a template for future designs. This simple design
will illustrate the functionality of the evaluation board
Getting Started
The following steps will make the proper board interconnections for power supplies, input signals, and output signals.
• Add push-on jumper shunts for the following.
Jumper Pin Pin Description
J101 1 2 Relay Ctrl
J64 3 5 2.5V setting
J59 3 5 2.5V setting
J63 3 5 2.5V setting
J69 3 5 2.5V setting
J74 3 5 2.5V setting
J78 3 5 2.5V setting
J75 3 5 2.5V setting
J70 3 5 2.5V setting
J36 2 3 DAT0-SER/PAR
J119 1 2 Switch power 3.3V
• Connect short 16-contact(2x8) IDC ribbon cable between J46[LEDS] and J20[DEBUG]
• Connect single patch cable between J34/Pin 3(OSC A-THXO) to J8/Pin 2(GPIO7[T2])
• Connect single patch cable between J29/Pin1 to J6(GPIO6[AL13])
• Place SW1.1 to “on” position (Figure 3)
SW1
Figure 1
ON
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