10
FN6983.1
January 14, 2010
FIGURE 12. INSERTION LOSS
FIGURE 13. OFF-ISOLATION
FIGURE 14. CROSSTALK
Typical Performance Curves T
A
= +25°C, Unless Otherwise Specified (Continued)
FREQUENCY (Hz)
GAIN (dB)
V
IN
= 0.707 V
RMS
R
L
= 32Ω
0
-0.5
-1.0
-1.5
-2.0
20 200 2k 20k
V
DD
= 3V
100 500 1k 10k
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
20 200 2k 20k
-40
-60
-80
-100
-120
-140
-160
100 500 1k 5k 10k
V
IN
= 0.2V
P-P
TO 2V
P-P
R
L
= 32Ω
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
V
IN
= 0.2V
P-P
TO 2V
P-P
R
L
= 32
Ω
20 200 2k 20k100 500 1k 5k 10k
-40
-60
-80
-100
-120
-140
-160
ISL54409, ISL54410
11
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6983.1
January 14, 2010
For additional products, see www.intersil.com/product_tree
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products
for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL54409
, ISL54410
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev.
DATE REVISION CHANGE
1/14/10 FN6983.0 Removed “Coming Soon” from TDFN package options in “Ordering Information” on page 4.
Added “ISL54409EVAL1Z” to “Ordering Information” on page 4.
Updated Package Outline Drawing L10.1.8x1.4A on page 12. Revisions were to move
dimensions from table onto drawing.
9/25/09 FN6983.0 Initial Release.
ISL54409, ISL54410
12
FN6983.1
January 14, 2010
ISL54409, ISL54410
Package Outline Drawing
L10.1.8x1.4A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 4, 9/09
Nd and Ne refer to the number of terminals on D (4) and E (6) side,
Dimension b applies to the metallized terminal and is measured
The configuration of the pin #1 identifier is optional, but must be
All dimensions are in millimeters. Tolerances ±0.05mm unless
N is the number of terminals. Total 10 leads.
6.
3.
5.
4.
2.
Dimensioning and tolerancing conform to ASME Y14.5-1994.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
6
B
1.40
A
1.80
0.10 C
2X
INDEX AREA
0.10 C
2X
21
21
0.50
NX 0.40
5
7
PIN #1 ID
(DATUM A)
(DATUM B)
0.10 M C A B
0.05 M C
NX 0.20
10X
5
0.40 BSC
C
0.05 C
0.5
0.10 C
0.05 MAX
SEATING PLANE
NX (0.20)
SECTION "C-C"
e
CC
5
C
L
TERMINAL TIP
(0.05 MAX)
0.40
0.127 REF
0.40
0.40 BSC
0.50
0.20
0.40
1.80
0.40
0.20
2.20
1.00
0.60
1.00
LAND PATTERN
10
respectively.
between 0.15mm and 0.30mm from the terminal tip.
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
Maximum package warpage is 0.05mm.
7.
Maximum allowable burrs is 0.076mm in all directions.
8.
JEDEC Reference MO-255.
9.
For additional information, to assist with the PCB Land Pattern
10.
Design effort, see Intersil Technical Brief TB389.
otherwise noted. Angles are in degrees.

ISL54410IRTZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
USB Switch ICs AUD/USB WIRED OR SWI SWITCH 2X2 IND
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union