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74LVCH32374AEC,518

P1-P3P4-P6P7-P9P10-P12P13-P15
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 4 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
6. Functional description
[1] H = HIGH voltage level
L = LOW voltage level
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW CP transition
l = LOW voltage level one set-up time prior to the HIGH-to-LOW CP transition
Z = high-impedance OFF-state
= LOW-to-HIGH CP transition
7. Limiting values
[1] All supply and ground pins connected externally to one voltage source.
[2] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[3] The output voltage ratings may be exceeded if the output current ratings are observed.
[4] Above 70 C the value of P
tot
derate linearly with 1.8 mW/K.
Table 3. Function table
[1]
Operating mode Input Internal flip-flop Output
nOE nCP nDn nQn
Load and read
register
L lLL
L hHH
Load register and
disable outputs
H lLZ
H hHZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)
[1]
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
I
IK
input clamping current V
I
<0 50 - mA
V
I
input voltage
[2]
0.5 +6.5 V
I
OK
output clamping current V
O
>V
CC
or V
O
<0 - 50 mA
V
O
output voltage output HIGH or LOW state
[3]
0.5 V
CC
+0.5 V
output 3-state
[3]
0.5 +6.5 V
I
O
output current V
O
=0V toV
CC
- 50 mA
I
CC
supply current - 200 mA
I
GND
ground current 200 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[4]
- 1000 mW
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 5 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 1.65 - 3.6 V
functional 1.2 - 3.6 V
V
I
input voltage 0 - 5.5 V
V
O
output voltage output HIGH or LOW state 0 - V
CC
V
output 3-state 0 - 5.5 V
T
amb
ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate V
CC
= 1.65 V to 2.7 V - - 20 ns/V
V
CC
= 2.7 V to 3.6 V - - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
V
IH
HIGH-level
input voltage
V
CC
= 1.2 V 1.08 - - 1.08 - V
V
CC
= 1.65 V to 1.95 V 0.65 V
CC
- - 0.65 V
CC
-V
V
CC
= 2.3 V to 2.7 V 1.7 - - 1.7 - V
V
CC
= 2.7 V to 3.6 V 2.0 - - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 1.2 V - - 0.12 - 0.12 V
V
CC
= 1.65 V to 1.95 V - - 0.35 V
CC
-0.35 V
CC
V
V
CC
= 2.3 V to 2.7 V - - 0.7 - 0.7 V
V
CC
= 2.7 V to 3.6 V - - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
=V
IH
or V
IL
I
O
= 100 A;
V
CC
= 1.65 V to 3.6 V
V
CC
0.2 - V
CC
0.3 - V
I
O
= 4mA; V
CC
= 1.65 V 1.2 - - 1.05 - V
I
O
= 8mA; V
CC
= 2.3 V 1.8 - - 1.65 - V
I
O
= 12 mA; V
CC
= 2.7 V 2.2 - - 2.05 - V
I
O
= 18 mA; V
CC
= 3.0 V 2.4 - - 2.25 - V
I
O
= 24 mA; V
CC
= 3.0 V 2.2 - - 2.0 - V
V
OL
LOW-level
output voltage
V
I
=V
IH
or V
IL
I
O
= 100 A;
V
CC
= 1.65 V to 3.6 V
- - 0.2 - 0.3 V
I
O
=4mA; V
CC
= 1.65 V - - 0.45 - 0.65 V
I
O
=8mA; V
CC
= 2.3 V - - 0.6 - 0.8 V
I
O
=12mA; V
CC
= 2.7 V - - 0.4 - 0.6 V
I
O
=24mA; V
CC
= 3.0 V - - 0.55 - 0.8 V
I
I
input leakage
current
V
CC
= 3.6 V;
V
I
=5.5VorGND
[2]
- 0.1 5- 20 A
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 6 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
[1] All typical values are measured at V
CC
= 3.3 V and T
amb
=25C.
[2] The bus hold circuit is switched off when V
I
> V
CC
allowing 5.5 V on the input pin.
[3] Valid for data inputs only. Control inputs do not have a bus hold circuit.
[4] The specified sustaining current at the data input holds the input below the specified V
I
level.
[5] The specified overdrive current at the data input forces the data input to the opposite logic input state.
I
OZ
OFF-state
output current
V
I
=V
IH
or V
IL
; V
CC
= 3.6 V;
V
O
=5.5VorGND
[2]
- 0.1 5- 20 A
I
OFF
power-off
leakage current
V
CC
= 0 V; V
I
or V
O
= 5.5 V - 0.1 10 - 20 A
I
CC
supply current V
CC
= 3.6 V;
V
I
=V
CC
or GND; I
O
=0A
-0.140-160A
I
CC
additional
supply current
per input pin;
V
CC
= 2.7 V to 3.6 V;
V
I
=V
CC
0.6 V; I
O
=0A
- 5 500 - 5000 A
C
I
input
capacitance
V
CC
= 0 V to 3.6 V;
V
I
=GNDtoV
CC
-5.0---pF
I
BHL
bus hold LOW
current
V
CC
= 1.65; V
I
= 0.58 V
[3][4]
10 - - 10 - A
V
CC
= 2.3; V
I
= 0.7 V 30 - - 25 - A
V
CC
= 3.0; V
I
= 0.8 V 75 - - 60 - A
I
BHH
bus hold HIGH
current
V
CC
= 1.65; V
I
= 1.07 V
[3][4]
10 - - 10 - A
V
CC
= 2.3; V
I
= 1.7 V 30 - - 25 - A
V
CC
= 3.0; V
I
= 2.0 V 75 - - 60 - A
I
BHLO
bus hold LOW
overdrive
current
V
CC
= 1.95 V
[3][5]
200 - - 200 - A
V
CC
= 2.7 V 300 - - 300 - A
V
CC
= 3.6 V 500 - - 500 - A
I
BHHO
bus hold HIGH
overdrive
current
V
CC
= 1.95 V
[3][5]
200 - - 200 - A
V
CC
= 2.7 V 300 - - 300 - A
V
CC
= 3.6 V 500 - - 500 - A
Table 6. Static characteristics
...continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
P1-P3P4-P6P7-P9P10-P12P13-P15

74LVCH32374AEC,518

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Buy 74LVCH32374AEC,518
Manufacturer:
NXP Semiconductors
Description:
Flip Flops 32-BIT 5V TOLERANT
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