C8051F800-DK
Rev. 0.2 7
7. Target Board
The C8051F800 Development Kit includes a target board with a C8051F800-GM device pre-installed for evaluation
and preliminary software development. Numerous input/output (I/O) connections are provided to facilitate
prototyping using the target board. Refer to Figure 3 for the locations of the various I/O connectors. Figure 4 on
page 8 shows the factory default shorting block positions. A summary of the signal names and headers is provided
in Table 5 on page 13.
P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
P2 USB connector (connects to PC for serial communication)
J1 22-pin Expansion I/O connector
J2 MCU power header (VDD)
J3 Port I/O configuration header
J4 DEBUG connector for Debug Adapter interface
J5 Connects pin P0.0 to the VREF bypass capacitors and TB1
J6, J7 Connects the potentiometer (R14) to pin P0.7 and +3VD
J8, J9 Connects pins P0.2 (XTAL1) and P0.3 (XTAL2) to J1
J10 Connects pin P0.1 to GND and TB1
TB1 Analog I/O terminal block
Figure 3. C8051F800 Target Board with Pin Numbers
CAPACITIVE SENSE
P1.5
P1.6
R14
D10
D9
+3VD
P0.7
J7J6
D8
D7
P1.0_LED
P1.1_LED
P1.2_LED
P1.3_LED
C8051F800-TB
P1.4
RESET
D4
COMM
F326
USB
DEBUG
J4
P1
POWER
D6
PWR
P1.0_LED
P1.1_LED
P1.2_LED
P1.3_LED
P1.4_SW
TX_MCU
RX_MCU
RTS
CTS
P1.0
P1.1
P1.2
P1.3
P1.4
P0.4
P0.5
P1.5
P1.6
J3
GND
P2.0
P1.6
P1.4
P1.2
P1.0
P0.6
P0.4
P0.2_J8
GND
RST
P1.7
P1.5
P1.3
P1.1
P0.7
P0.5
P0.3_J9
J1
P0.0
+3VD
P0.1
+3VD
F800
U1
J9 J8
P0.3_J9
P0.2_J8
J5
P0.0
P0.0/VREF
P1.1
P1.0
P0.6/CNVSTR
P0.0/VREF
GND
P0.1
J2
J10
GND
P0.1
SILICON LABS
www.silabs.com
XTAL2
XTAL1
TB1
VDD
+3VD
GND
Prototype Area
Prototype Area I/O Connection Points
Pin 1
Pin 1
Pin 1
Pin 2
Pin 2
Pin 1
Pin 2
C8051F800-DK
8 Rev. 0.2
7.1. Target Board Shorting Blocks: Factory Defaults
The C8051F800 Target Board comes from the factory with pre-installed shorting blocks on many headers. Figure 4
shows the positions of the factory default shorting blocks. It should be noted that a shorting block on J2 to connect
power to the MCU is required for normal operation.
Figure 4. C8051F800 Target Board Shorting Blocks: Factory Defaults
CAPACITIVE SENSE
P1.5
P1.6
R14
D10
D9
+3VD
P0.7
J7J6
D8
D7
P1.0_LED
P1.1_LED
P1.2_LED
P1.3_LED
C8051F800-TB
P1.4
RESET
D4
COMM
F326
USB
DEBUG
J4
P1
POWER
D6
PWR
P1.0_LED
P1.1_LED
P1.2_LED
P1.3_LED
P1.4_SW
TX_MCU
RX_MCU
RTS
CTS
P1.0
P1.1
P1.2
P1.3
P1.4
P0.4
P0.5
P1.5
P1.6
J3
GND
P2.0
P1.6
P1.4
P1.2
P1.0
P0.6
P0.4
P0.2_J8
GND
RST
P1.7
P1.5
P1.3
P1.1
P0.7
P0.5
P0.3_J9
J1
P0.0
+3VD
P0.1
+3VD
F800
U1
J9 J8
P0.3_J9
P0.2_J8
J5
P0.0
P0.0/VREF
P1.1
P1.0
P0.6/CNVSTR
P0.0/VREF
GND
P0.1
J2
J10
GND
P0.1
SILICON LABS
www.silabs.com
XTAL2
XTAL1
TB1
VDD
+3VD
GND
Prototype Area
Prototype Area I/O Connection Points
Pin 1
Pin 1
Pin 1
Pin 2
Pin 2
Pin 1
Pin 2
C8051F800-DK
Rev. 0.2 9
7.2. Target Board Power Options and Current Measurement (P1, P2, J2, J4)
The C8051F800 Target Board supports three power options:
1. 12 VDC power using the AC to DC power adapter (P1)
2. 5 VDC USB VBUS power from PC via the USB Debug Adapter (J4)
3. 5 VDC USB VBUS power from PC via the CP2103 USB connector (P2, labeled “COMM”)
All the three power sources are ORed together using reverse-biased diodes (D1, D2, D3), eliminating the need for
headers to choose between the sources. The target board will operate as long as any one of the power sources is
present. The ORed power is regulated to a 3.3 V dc voltage using a LDO regulator (U2). The output of the regulator
powers the +3 VD net on the target board, and is also connected to one end of the header J2. A shorting block
should be installed on J2 to power the VDD net, which powers the C8051F800 MCU. With the shorting block
removed, a multimeter can be used across J2 to measure the current consumption of the MCU.
7.3. System Clock Sources (J8, J9)
7.3.1. Internal Oscillators
The C8051F800 device installed on the target board features a factory-calibrated, programmable high-frequency
internal oscillator (24 MHz base frequency, ±2%), which is enabled as the system clock source on reset. After
reset, the internal oscillator operates at a frequency of 3.0625 MHz by default but may be configured by software to
operate at other frequencies. The on-chip crystal is accurate for many serial communications (UART, SPI, SMBus)
and an external oscillator is not required depending on the bit rate. However, if you wish to operate the C8051F800
device at a frequency not available with the internal oscillator, an external crystal may be used. Refer to the
C8051F80x-83x data sheet for more information on configuring the system clock source.
7.3.2. External Oscillator Options
The target board is designed to facilitate the installation of an external crystal. Remove shorting blocks at headers
J8 and J9 and install the crystal at the pads marked Y1. Install a 10 M resistor at R9 and install capacitors at C13
and C14 using values appropriate for the crystal you select. If you wish to operate the external oscillator in
capacitor or RC mode, options to install a capacitor or an RC network are also available on the target board.
Populate C13 for capacitor mode, and populate R7 and C13 for RC mode. Refer to the C8051F80x-83x data sheet
for more information on the use of external oscillators.

C8051F800DK

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Development Boards & Kits - 8051 C8051F800 MCU Family Development Kit
Lifecycle:
New from this manufacturer.
Delivery:
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