49FCT805CTSOG8

4
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fONO)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
I
CC Quiescent Power Supply Current VCC = Max. 1 2 mA
TTL Inputs HIGH VIN = 3.4V
(3)
ICCD Dynamic Power Supply Current
(4)
VCC = Max. VIN = VCC 60 100 µA/MHz
Outputs Open VIN = GND
OE
A = OEB = GND
50% Duty Cycle
I
C Total Power Supply Current
(6)
VCC = Max. VIN = VCC 1.5 3
Outputs Open V
IN = GND
fO = 25MHz
50% Duty Cycle V
IN = 3.4V 1.8 4
OE
A = OEB = VCC VIN = GND
Mon. Output Toggling
VCC = Max. VIN = VCC 33 55.5
(5)
mA
Outputs Open VIN = GND
fO = 50MHz
50% Duty Cycle VIN = 3.4V 33.5 57.5
(5)
OEA = OEB = GND VIN = GND
Eleven Outputs Toggling
5
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
NOTES:
1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply
skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
(1,2)
FCT805BT FCT805CT
Symbol Parameter Conditions
(3)
Min.
(4)
Max. Min.
(4)
Max. Unit
t
PLH Propagation Delay CL = 50pF 1.5 5.7 1.5 5.2 ns
tPHL INA to OAx, INB to OBx RL = 500
tR Output Rise Time 2 2 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.9 0.7 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.9 0.8 ns
of same output (|tPHL -– tPLH|)
t
SK(PP) Part-to-part skew: skew between outputs of different 1.5 1.2 ns
packages at same power supply voltage,
temperature, package type and speed grade
t
PZL Output Enable Time 1.5 6.5 1.5 6 ns
tPZH OEA to OAx, OEB to OBx
t
PLZ Output Disable Time 1.5 6.5 1.5 6 ns
t
PHZ OEA to OAx, OEB to OBx
NOTES:
1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply
skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(1,2)
FCT805BT FCT805CT
Symbol Parameter Conditions
(3)
Min.
(4)
Max. Min.
(4)
Max. Unit
t
PLH Propagation Delay CL = 50pF 1.5 5 1.5 4.5 ns
tPHL INA to OAx, INB to OBx RL = 500
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.7 0.5 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.7 0.6 ns
of same output (|tPHL -– tPLH|)
tSK(PP) Part-to-part skew: skew between outputs of different 1.2 1 ns
packages at same power supply voltage,
temperature, package type and speed grade
t
PZL Output Enable Time 1.5 6 1.5 5 ns
tPZH OEA to OAx, OEB to OBx
t
PLZ Output Disable Time 1.5 6 1.5 5 ns
t
PHZ OEA to OAx, OEB to OBx
6
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
7V
VCC
Pulse
Generator
D.U.T.
500
500
RT
VIN
VOUT
50pF
C
L
0V
V
OH
tPLH
tPHL
VOL
tR
3V
1.5V
tF
2.0V
0.8V
1.5V
OUTPUT
INPUT
CONTROL
INPUT
tPLZ
0V
OUTPUT
NORMALLY
LOW
tPZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SWITCH
OPEN
tPHZ
0V
V
OL
VOH
0.3V
0.3V
1.5V
1.5V
t
PZL
3.5V
3.5V
3V
1.5V
0V
V
OH
tPLH
tPHL
VOL
3V
1.5V
1.5V
OUTPUT
INPUT
tSK(p) = tPHL - tPLH
0V
V
OH
tPLH1
VOL
1.5V
OUTPUT 1
3V
1.5V
INPUT
V
OH
tSK(o)
VOL
1.5V
t
SK(o) = tPLH2 - tPLH1 or tPHL2 - tPHL1
OUTPUT 2
t
PLH1
tSK(o)
tPLH2
tPHL2
0V
V
OH
tPLH1
VOL
1.5VPACKAGE 1
OUTPUT
3V
1.5V
INPUT
V
OH
tSK(pp)
VOL
1.5V
t
SK(pp) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHL1
tSK(pp)
tPLH2
tPHL2
PACKAGE 2
OUTPUT
Package Delay
TEST CIRCUITS AND WAVEFORMS
Pulse Skew - tSK(P)
Test Circuits for All Outputs
DEFINITIONS:
C
L = Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Switch
Disable LOW Closed
Enable LOW
Disable HIGH GND
Enable HIGH
SWITCH POSITION
Enable and Disable Times
Output Skew
Part-to-Part Skew - tSK(PP)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
NOTE:
1. Package 1 and Package 2 are same device type and speed grade.

49FCT805CTSOG8

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution Dual Clock Driver w/TTL Outputs
Lifecycle:
New from this manufacturer.
Delivery:
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