MAX8529
1.5MHz Dual 180° Out-of-Phase
PWM Step-Down Controller with POR
6 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 COMP2 Compensation Pin for Regulator 2 (REG2). Compensate REG2’s control loop as shown in Figure 1.
2 FB2
Feedback Input for Regulator 2 (REG2). Connect FB2 to a resistive-divider between REG2’s output
and GND to adjust the output voltage between 1V and 18V. To set the output voltage below 1V,
connect FB2 to a resistive voltage-divider from REF to REG2’s output (see the Setting the Output
Voltage section).
3 ILIM2
Current-Limit Adjustment for Regulator 2 (REG2). The PGND–LX2 current-limit threshold defaults to
100mV if ILIM2 is connected to V
L
. Connect a resistor (R
ILIM2
) from ILIM2 to GND to adjust the
REG2’s current-limit threshold (V
ITH2
) from 50mV (R
ILIM2
= 100kΩ) to 300mV (R
ILIM2
= 600kΩ) (see
the Setting the Valley Current Limit section).
4 OSC
Oscillator Frequency Set Input. The controller generates the clock signal by dividing down the
oscillator, so the switching frequency equals half the synchronization frequency (f
SW
= f
OSC
/ 2).
Connect a resistor from OSC to GND (R
OSC
) to set the switching frequency from 600kHz (R
OSC
=
10kΩ) to 1500kHz (R
OSC
= 4kΩ). The controller still requires R
OSC
when an external clock is
connected to SYNC. When using SYNC, set R
OSC
for one half of the SYNC input.
5 V+ Input Supply Voltage (4.75V to 23V)
6 REF 2V Reference Output. Bypass to GND with a 0.22µF or greater ceramic capacitor.
7 GND Analog Ground
8 CKO
Clock Output. Clock Output for external 2- or 4-phase synchronization (see the Clock Synchronization
(SYNC, CKO) section).
9 SYNC
Synchronization Input or Clock Output Selection Input. SYNC has three operating modes. Connect
SYNC to a 1200kHz to 2800kHz clock for external synchronization. Connect SYNC to GND for 2-
phase operation as a master controller. Connect SYNC to V
L
for 4-phase operation as a master
controller (see the Clock Synchronization (SYNC, CKO) section).
10 ILIM1
Current-Limit Adjustment for Regulator 1 (REG1). The PGND–LX1 current-limit threshold defaults to
100mV if ILIM1 is connected to V
L
. Connect a resistor (R
ILIM1
) from ILIM1 to GND to adjust REG1’s
current-limit threshold (V
ITH1
) from 50mV (R
ILIM1
= 100kΩ) to 300mV (R
ILIM1
= 600kΩ) (see the
Setting the Valley Current Limit section).
11 FB1
Feedback Input for Regulator 1 (REG1). Connect FB1 to a resistive-divider between REG1’s output
and GND to adjust the output voltage between 1V and 18V. To set the output voltage below 1V,
connect FB1 to a resistive voltage-divider from REF and REG1’s output (see the Setting the Output
Voltage section).
12 COMP1 Compensation Pin for Regulator 1 (REG1). Compensate REG1’s control loop as shown in Figure 1.
13 RST
Open-Drain Reset Output. RST is low when either output voltage is more than 10% below its
regulation point. After soft-start is completed and both outputs exceed 90% of their nominal output
voltage (V
FB
_ > 0.9V), RST becomes high impedance after a 140ms delay and remains high
impedance as long as both outputs maintain regulation. Connect a resistor between RST and the
logic supply for logic-level voltages.
