74LVC245A
Document number: DS35890 Rev. 1 - 2
5 of 10
www.diodes.com
August 2014
© Diodes Incorporated
74LVC245
NEW PRODUCT
Switching Characteristics
Symbol Parameter
Test
Conditions
V
CC
T
A
= +25°C
T
A
= -40°C to
+85°C
T
A
= -40°C to
+125°C
Unit
Min Ty Max Min Max Min Max
t
PD
Propagation
Delay A
N
to B
N
or B
N
to A
N
Figure 1
1.8V ± 0.15V 1 6.0 12.2 1 12.7 1 16.9
ns
2.5V ± 0.2V 1 3.9 8.1 1 8.5 1 9.1
2.7V 1 4.2 8.7 1 9.6 1 9.9
3.3V ± 0.3 1.5 3.8 8.1 1.5 8.7 1.5
9.2
t
EN
Enable Time
OE to A
N
or OE to B
N
Figure 1
1.8V ± 0.15V
1 7 14.8 1 15.3 1
22.5
ns
2.5V ± 0.2V 1 4.5 10 1 10.5 1
12.4
2.7V 1 5.4 9.3 1 9.5 1
12.0
3.3V ± 0.3 1.5 4.4 8.3 1.5 8.5 1.5
11.0
t
DIS
Disable Time
OE
to A
N
or
OE
to B
N
Figure 1
1.8V ± 0.15V
1 7.8 16.5 1 17 1
14.2
ns
2.5V ± 0.2V 1 4 9 1 9.5 1 8.2
2.7V 1 4.4 8.3 1 8.5 1 10.0
3.3V ± 0.3 1.7 4.1 7.3 1.7 7.5 1.7 9.0
t
sk(0)
Output Skew
Time
3.3V ± 0.3 —
— 1.0 — — —
1.5 ns
Operating Characteristics
T
A
= +25°C
Symbol Parameter Test Conditions
V
CC
Typ Unit
C
pd
Power dissipation
capacitance per gate
F = 10MHz
Outputs Enabled
1.8V ± 0.15V 9.9
pF
2.5V ± 0.2V 10.2
3.3V ± 0.3V 10.6
Package Characteristics
Symbol Parameter Package Test Conditions Min Typ. Max Unit
JA
Thermal Resistance
Junction-to-Ambient
TSSOP-20 (Note 9) — 74 — °C/W
JC
Thermal Resistance
Junction-to-Case
TSSOP-20 (Note 9)
—
15
—
°C/W
JA
Thermal Resistance
Junction-to-Ambient
V-QFN4525-20 (Note 9)
—
67
—
°C/W
JC
Thermal Resistance
Junction-to-Case
V-QFN4525-20 (Note 9)
—
20
—
°C/W
Note: 9. Test conditions for TSSOP-20 and V-QFN4525-20: Devices mounted on 4 layer FR-4 substrate PC board, 2oz copper, with minimum recommended
pad layout per JESD 51-7.