LD6938CX6/3333PLJ

LD6938_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Objective data sheet Rev. 1 — 11 July 2013 4 of 15
NXP Semiconductors
LD6938 series
Dual low-dropout regulators, low noise, 300 mA
4. Block diagram
Fig 2. Block diagram dual LDO with auto discharge function (-PL version)
Fig 3. Block diagram dual LDO with high-ohmic output (-H version)
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LD6938_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Objective data sheet Rev. 1 — 11 July 2013 5 of 15
NXP Semiconductors
LD6938 series
Dual low-dropout regulators, low noise, 300 mA
5. Limiting values
[1] The (absolute) maximum power dissipation depends on the junction temperature T
j
. Higher power
dissipation is allowed with lower ambient temperatures. The conditions to determine the specified values
are T
amb
=25C and the use of a two-layer Printed-Circuit Board (PCB).
[2] According to IEC 61340-3-1.
[3] According to JESD22-A115C.
6. Recommended operating conditions
[1] See Section 9.1 “Input and output capacitor values.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
T
stg
storage temperature 55 +150 C
T
j
junction temperature 40 +125 C
T
amb
ambient temperature 40 +85 C
P
tot
total power dissipation
[1]
-1000mW
V
ESD
electrostatic discharge
voltage
human body model level 4
[2]
- 2kV
machine model class 3
[3]
- 200 V
Pin IN, EN1 and EN2
V
I
input voltage 4 ms transient 0.5 +6.0 V
V
EN
voltage on pin EN 4 ms transient 0.5 +6.0 V
Pin OUT1 and OUT2
V
O
output voltage 4 ms transient 0.5 +6.0 V
I
O
output current 0 500 mA
Table 6. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
T
amb
ambient temperature 40 +85 C
T
j
junction temperature - +125 C
Pin IN
V
I
input voltage 1.7 5.5 V
C
ext(IN)
external capacitance on pin IN
[1]
1.0 - F
Pin EN1 and EN2
V
EN
voltage on pin EN 0 V
I
V
Pin OUT1 and OUT2
V
O
output voltage 0 5.5 V
C
L(ext)
external load capacitance
[1]
1.0 - F
LD6938_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Objective data sheet Rev. 1 — 11 July 2013 6 of 15
NXP Semiconductors
LD6938 series
Dual low-dropout regulators, low noise, 300 mA
7. Thermal characteristics
[1] The overall R
th(j-a)
can vary depending on the board layout. To minimize the effective R
th(j-a)
, all pins must
have a solid connection to larger Cu layer areas for example to the power and ground layer. In multi-layer
PCB applications, the second layer should be used to create a large heat spreader area directly below the
LDO. If this layer is either ground or power, it should be connected with several vias to the top layer
connecting to the device ground or supply. Avoid the use of solder-stop varnish under the chip.
[2] Use the measurement data given for a rough estimation of the R
th(j-a)
in your application. The actual R
th(j-a)
value can vary in applications using different layer stacks and layouts.
8. Characteristics
Table 7. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-a)
thermal resistance from junction to
ambient
[1][2]
100 K/W
Table 8. Electrical characteristics
At recommended input voltages and T
amb
=
40
Cto+85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Output voltage (pin OUT1 and OUT2)
V
do
dropout voltage I
O
=300mA; V
IN
V
O(nom)
- 240 400 mV
V
O
output voltage variation V
O
1.5 V; I
O
=1mA
T
amb
=+25C 2- +2%
30 C T
amb
+85 C 3- +3%
V
O
<1.5V; I
O
=1mA
T
amb
=+25C 3- +3%
30 C T
amb
+85 C 4- +4%
Line regulation error
V
O
/(V
O
xV
I
) relative output voltage
variation with input voltage
V
I
=(V
O(nom)
+ 1 V) to 5.5 V;
I
O
=1mA
0.1 - +0.1 %/V
V
O
/V
O
relative output voltage
variation
V
I
=(V
O(nom)
+ 1 V) to 5.5 V;
I
O
=1mA
0.33 - +0.33 %
Load regulation error
V
O
/(V
O
xI
O
) relative output voltage
variation with output current
V
I
=V
O(nom)
+1V;
1mA I
O
300 mA
- 0.0025 0.0065 %/mA
V
O
/V
O
relative output voltage
variation
V
I
=V
O(nom)
+1V - - 2 %

LD6938CX6/3333PLJ

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
LDO Voltage Regulators LD6938CX6/3333PL/WLCSP6/REEL13
Lifecycle:
New from this manufacturer.
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