LTC3260
13
3260fa
applicaTions inForMaTion
The derating curve in Figure 6 assumes a maximum ther-
mal resistance, θ
JA
, of 43°C/W for the package. This can
be achieved with a four layer PCB that includes 2oz Cu
traces and six vias from the exposed pad of the LTC3260
to the ground plane.
It is recommended that the LTC3260 be operated in the
region corresponding to T
J
≤ 150°C for continuous op-
eration as shown in Figure 6. Operation beyond 150°C
should be avoided as it may degrade part performance
and lifetime. At high temperatures, typically around 175°C,
the part is placed in thermal shutdown and all outputs are
disabled. When the part cools back down to a low enough
temperature, typically around 165°C, the outputs are re-
enabled and the part resumes normal operation.
Figure 6. Maximum Power Dissipation vs Ambient Temperature
Typical applicaTions
Low Power ±24V Power Supply from a Single-Ended 28V Input Supply
C4
4.7µF
C1
4.7µF
C2
F
C7
4.7µF
C3
4.7µF
R4
1.91M
R1
1.91M
R3
100k
R2
100k
24V
–24V
3260 TA02
LDO
+
9
1
11
12
8
7
6
2
5
4
3
15
14
13
10
28V
LDO
ADJ
+
LTC3260
RT
ADJ
GND
BYP
+
BYP
V
IN
V
OUT
EN
+
C
MODE
EN
C
+
High Voltage Input to Bipolar Output with Highly Efficient Dividing/Inverting Charge Pump
C1
4.7µF
50V
C4
4.7µF
C8
4.7µF
25V
C7
4.7µF
C6
0.01µF
C5
0.01µF
C2
F
50V
C3
F
50V
NOTE: THE LTC3260 WILL ALWAYS RUN
IN CONTINUOUS FREQUENCY REGARDLESS
OF THE MODE PIN SETTING BECAUSE V
OUT
IS ALWAYS LESS THAN –1/2V
IN
D1
MBR0540
D2
MBR0540
D3
MBR0540
14 17 2
R1
316k
R2
100k
R3
100k
R4
316k
5V
–5V
3260 TA04
LDO
+
11 12
15
16
3
4
5
13
10
7
1
13.5V TO 32V
LDO
6
V
OUT
ADJ
+
LTC3260
GND RTMODE
ADJ
BYP
+
BYP
V
IN
EN
+
C
EN
C
+
V
OUT
~
V
IN
V
F
I
OUT
ROL
2
V
F
AMBIENT TEMPERATURE (°C)
–50
0
MAXIMUM POWER DISSIPATION (W)
1
3
4
5
0
50
75 175
3260 F06
2
–25 25
100
125
150
6
RECOMMENDED
OPERATION
T
J
= 150°C
θ
JA
= 43°C/W
LTC3260
14
3260fa
Typical applicaTions
28V Dual Tracking Bipolar Supply with Outputs from ±5V to ±25V
C1
4.7µF
50V
C3
4.7µF
35V
C7
4.7µF
50V
C6
4.7µF
35V
C4
0.01µF
C2
F
50V
14
2
17
R1
732k
R2
73.2k
R3
500k
R4
732k
OUT
–OUT
3260 TA05
LDO
+
11 12
15
16
4
3
5
13
10
7
1
28V
LDO
6
V
OUT
ADJ
+
LTC3260
GND
MODE
RT
ADJ
BYP
+
BYP
V
IN
EN
+
C
EN
C
+
C5
0.01µF
LTC3260
15
3260fa
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(2 SIDES)
4.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ±0.10
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
3.00 REF
17
148
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DE14) DFN 0806 REV B
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
0.25 ±0.05
0.50 BSC
3.30 ±0.10
1.70 ±0.05
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 ±0.05
0.70 ±0.05
3.60 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
3.30 ±0.05
0.50 BSC
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)

LTC3260IDE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Controllers Low Noise Dual Supply Inverting Charge Pump
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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