MAX4310–MAX4315
Digital Interface
The multiplexer architecture of the MAX4310–MAX4315
ensures that no two input channels are ever connected
together. Channel selection is accomplished by apply-
ing a binary code to channel address inputs. The
address decoder selects input channels, as shown in
Table 2. All digital inputs are CMOS compatible.
High-Speed Evaluation Board
Figures 10 and 11 show the evaluation board and pre-
sent a suggested layout for the circuits. This board was
developed using the techniques described in the
Layout and Power-Supply Bypassing section. The
smallest available surface-mount resistors were used
for feedback and back-termination to minimize their dis-
tance from the part, reducing the capacitance associat-
ed with longer lead lengths.
SMA connectors were used for best high-frequency
performance. Inputs and outputs do not match a 75Ω
line, but this does not affect performance since dis-
tances are extremely short. However, in applications
that require lead lengths greater than one-quarter of the
wavelength of the highest frequency of interest, use
constant-impedance traces. Fully assembled evaluation
boards are available for the MAX4313 in an SO pack-
age.
High-Speed, Low-Power, Single-Supply
Multichannel, Video Multiplexer-Amplifiers
16 ______________________________________________________________________________________
MAX4313
0.1
µF
75Ω
8OUT
3
V
CC
+4V TO +10.5V
IN1
IN0
5
4
1627
A0
75Ω
500Ω
GND
V
EE
SHDN
500Ω
VIDEO
OUTPUT
75Ω CABLE
Typical Operating Circuit
Chip Information
TRANSISTOR COUNT: 156
Package Information
For the latest package outline information, go to
www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 SO S8-4
21-0041
8 µMAX U8-1
21-0036
14 Narrow SO S14-1
21-0041
16 Narrow SO S16-1
21-0041
16 QSOP E16-1
21-0055
