6
LTC1878
+
–
+
–
+
–
+
–
+
–
OVDET
EA
+
–
I
RCMP
+
–
I
COMP
8
7
3
1
RUN
PLL LPF
VCO
X
Y
Y = “0” ONLY WHEN X IS A CONSTANT “1”
BURST
DEFEAT
SLOPE
COMP
OSC
SYNC/MODE
0.6V
FREQ
SHIFT
V
REF
0.8V
0.85V
Ω
g
m
= 0.5m
0.8V REF
SHUTDOWN
0.55V
0.8V
SLEEP
V
IN
V
IN
V
IN
V
IN
I
TH
SLEEP
V
FB
EN
BURST
V
IN
2
S
R
RS LATCH
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI-
SHOOT-
THRU
Q
Q
6Ω
6
SW
5
GND
1878 BD
4
FU CTIO AL DIAGRA
U
U
W
RUN (Pin 1): Run Control Input. Forcing this pin below
0.4V shuts down the LTC1878. In shutdown all functions
are disabled drawing <1µA supply current. Forcing this
pin above 1.2V enables the LTC1878. Do not leave RUN
floating.
I
TH
(Pin 2): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.5V
to 1.9V.
V
FB
(Pin 3): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 4): Ground Pin.
SW (Pin 5): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
V
IN
(Pin 6): Main Supply Pin. Must be closely decoupled
to GND, Pin 4.
SYNC/MODE (Pin 7): External Clock Synchronization and
Mode Select Input. To synchronize with an external clock,
apply a clock with a frequency between 400kHz and
700kHz. To select Burst Mode operation, tie to V
IN
. Ground-
ing this pin selects pulse skipping mode. Do not leave this
pin floating.
PLL LPF (Pin 8): Output of the Phase Detector and Control
Input of Oscillator. Connect a series RC lowpass network
from this pin to ground if externally synchronized. If
unused, this pin may be left open.
UU
U
PI FU CTIO S
