AD8024
–9–
REV. C
General
The AD8024 is a wide bandwidth, quad video amplifier. It offers a
high level of performance on 16 mA total quiescent supply cur-
rent for closed-loop gains of ±1 or greater.
Bandwidth up to 380 MHz, low differential gain and phase errors,
and high output current make the AD8024 an efficient video
amplifier.
The AD8024’s wide phase margin and high output current make it
an excellent choice when driving any capacitive load.
Choice of Feedback Resistor
Because it is a current feedback amplifier, the closed-loop
bandwidth of the AD8024 may be customized with the feed-
back resistor.
A larger feedback resistor reduces peaking and increases the
phase margin at the expense of reduced bandwidth. A smaller
feedback resistor increases bandwidth at the expense of increased
peaking and reduced phase margin.
The closed-loop bandwidth is affected by attenuation due to the
finite output resistance. The open-loop output resistance of 6
reduces the bandwidth somewhat when driving load resistors less
than 150 . The bandwidth will be 10% greater for load resis-
tance above a few hundred ohms.
The value of the feedback resistor is not critical unless maintaining
the widest or flattest frequency response is desired. Table I shows
the bandwidth at different supply voltages for some useful closed-
loop gains when driving a 150 load. The recommended resistors
are for the widest bandwidth with less than 2 dB peaking.
Table I. –3 dB Bandwidth vs. Closed-Loop Gain Resistor,
R
L
= 150
V
S
– Volts Gain R
F
BW – MHz
±7.5 +1 5000 350
+2 750 275
+10 400 105
–1 750 165
±12 +1 8000 380
+10 215 150
–1 750 95
±2.5 +2 1125 125
Driving Capacitive Loads
When used in combination with the appropriate feedback resistor,
the AD8024 will drive any load capacitance without oscillation.
In accordance with the general rule for current feedback ampli-
fiers, increased load capacitance requires the use of a higher
feedback resistor for stable operation.
Due to the high open-loop transresistance and low inverting
input current of the AD8024, large feedback resistors do not
create large closed-loop gain errors. In addition, the high output
current allows rapid voltage slewing on large load capacitors.
For wide bandwidth and clean pulse response, an additional
small series output resistor of about 10 is recommended.
+
AD8024
R
F
R
G
R
T
R
S
+V
S
V
S
1.0F
0.1F
1.0F
0.1F
C
L
V
O
V
IN
Figure 3. Circuit for Driving a Capacitive Load
V
OUT
V
IN
1V 20nS
2V
Figure 4. Pulse Response Driving a Large Load
Capacitance, C
L
= 300 pF, G = +3, R
FB
= 2.32 k
,
R
S
= 10.5
, R
L
= 1 k
, V
S
=
±
7.5 V
AD8024
–10–
REV. C
Overload Recovery
The most important overload conditions are:
Input Common-Mode Voltage Overdrive
Output Voltage Overdrive
Input Current Overdrive.
When configured for a low closed-loop gain, the AD8024
recovers quickly from an input common-mode voltage over-
drive; typically in <25 ns.
When configured for a higher gain and overloaded at the output,
recovery from an output voltage overdrive is also short; approxi-
mately 55 ns (see Figure 5). For higher overdrive, the response
is somewhat slower. For 100% overdrive, the recovery time is
substantially longer.
When configured for a high noninverting gain, a high input over-
drive can result in a large current into the input stage. Although
this current is internally limited to approximately 30 mA, its
effect on the total power dissipation may be significant. See also
the warning under Maximum Power Dissipation.
V
OUT
V
IN
1V
5V
50ns
Figure 5. 15% Overload Recovery, Gain = +10
(R
FB
= 400
, R
L
= 1 k
, V
S
=
±
7.5 V)
Disable Mode Operation
When the Disable pin is tied to DGND, all amplifiers are opera-
tional, in the enabled state.
When the voltage on the Disable pin is raised to 1.6 V or more
above DGND, all amplifiers are in the disabled, powered-down
state. In this condition, the DISABLE pin sources approximately
0.1 µA, the total quiescent current is reduced to approximately
500 µA, all outputs are in a high impedance state, and there is a
high level of isolation from inputs to outputs.
The output impedance in the disabled mode is the equivalent of all
external resistors, seen from the output pin, in parallel with the
total disabled output impedance of the amplifier, typically 20 pF.
The input stages of the AD8024 include protection from large
differential input voltages that may be present in the disabled
mode. Internal clamps limit this voltage to 1.5 V. The high input-
to-output isolation is maintained for voltages below this limit.
AD8024
–11–
REV. C
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic SOIC
(R-16A)
16
9
8
1
0.1574 (4.00)
0.1497 (3.80)
0.3937 (10.00)
0.3859 (9.80)
0.050 (1.27)
BSC
PIN 1
0.2440 (6.20)
0.2284 (5.80)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)

AD8024ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers Quad 350MHz 24V
Lifecycle:
New from this manufacturer.
Delivery:
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