SiP32508, SiP32509
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Vishay Siliconix
S16-0319-Rev. B, 29-Feb-16
8
Document Number: 62754
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Fig. 25 - Typical Turn-On Delay, Rise Time
C
OUT
= 200 μF, C
IN
= 4.7 μF, R
OUT
= 10
Fig. 26 - Typical Fall Time
C
OUT
= 200 μF, C
IN
= 4.7 μF, R
OUT
= 10
DETAILED DESCRIPTION
SiP32508 and SiP32509 are advanced slew rate controlled
high side load switches consisted of a n-channel power
switches. When a device is enable the gate of the power
switch is turned on at a controlled rate to avoid excessive
in-rush current. Once fully on the gate to source voltage of
the power switch is biased at a constant level. The design
gives a flat on resistance throughout the operating voltages.
When the device is off, the reverse blocking circuitry
prevents current from flowing back to input if output is
raised higher than input. The reverse blocking mechanism
also works in case of no input applied.
APPLICATION INFORMATION
Input Capacitor
SiP32508 and SiP32509 do not require input capacitor. To
limit the voltage drop on the input supply caused by
transient inrush currents, a input bypass capacitor is
recommended. A 2.2 µF ceramic capacitor placed as close
to the V
IN
and GND should be enough. Higher values
capacitor can help to further reduce the voltage drop.
Ceramic capacitors are recommended for their ability to
withstand input current surge from low impedance sources
such as batteries in portable devices.
Output Capacitor
While these devices work without an output capacitor,
an 0.1 µF or larger capacitor across V
OUT
and GND is
recommended to accommodate load transient condition. It
also helps preventing parasitic inductance from forcing V
OUT
below GND when switching off. Output capacitor has
minimal affect on device’s turn on slew rate time. There is no
requirement on capacitor type and its ESR.
Enable
The EN pin is compatible with both TTL and CMOS logic
voltage levels. Enable pin voltage can be above IN once it is
within the absolute maximum rating range.
Protection Against Reverse Voltage Condition
Both SiP32508 and SiP32509 contain reverse blocking
circuitry to protect the current from going to the input from
the output in case where the output voltage is higher than
the input voltage when the main switch is off. Reverse
blocking works for input voltage as low as 0 V.
Thermal Considerations
SiP32508 and SiP32509 are designed to maintain a
constant output load current. Due to physical limitations of
the layout and assembly of the device the maximum switch
current is 3 A, as stated in the Absolute Maximum Ratings
table. However, another limiting characteristic for the safe
operating load current is the thermal power dissipation of
the package. To obtain the highest power dissipation (and a
thermal resistance of 150 °C/W) the IN and OUT pins of the
device should be connected to heat sinks on the printed
circuit board. Figure 27 shows a demo board layout. All
copper traces and vias for the IN and OUT pins should be
sized adequately to carry the maximum continuous current.
The maximum power dissipation in any application is
dependant on the maximum junction temperature,
T
J
(max.) = 125 °C, the junction-to-ambient thermal
resistance for the TSOT23-6 package,
J-A
= 150 °C/W, and
the ambient temperature, T
A
, which may be formulaically
expressed as:
EN
5V
OUT
I
OUT
for 5V
OUT
3.6V
OUT
I
OUT
for 3.6V
OUT
1.5V
OUT
I
OUT
for 1.5V
OUT
2 V/Div, 0.25 A/Div, 2 ms/Div
EN
5V
OUT
I
OUT
for 5V
OUT
3.6V
OUT
I
OUT
for 3.6V
OUT
1.5V
OUT
I
OUT
for 1.5V
OUT
2 V/Div, 0.25 A/Div, 2 ms/Div
150
125
(max.)
(max.)
A
A
J
A
J
T
TT
P
-
=
-
=
-
θ
