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CS5371-BSZR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
CS5371 CS5372
16 DS255F3
10. PIN DESCRIPTION - CS5371
Power Supplies
VA+
_
Positive Analog Power Supply, pin 8
Positive supply voltage.
VA-
_
Negative Analog Power Supply, pin 7
Negative supply voltage.
VD
_
Positive Digital Power Supply, pin 13, 18
Positive supply voltage.
DGND
_
Digital Ground, pin 17
Analog Inputs
INR+
_
Rough Non-Inverting Input, pin 1
Rough non-inverting analog input. The rough input settles non-linear currents to improve
linearity on the fine input and reduce harmonic distortion.
INR-
_
Rough Inverting Input, pin 4
Rough inverting analog input. The rough input settles non-linear currents to improve linearity
on the fine input and reduce harmonic distortion.
INF+
_
Fine Non-Inverting Input, pin 2
Fine non-inverting analog input.
1
2
3
4
5
6
7
817
18
19
20
21
22
23
24
9
10
11
12 13
14
15
16
Rough Non-Inverting Input INR+
Fine Non-Inverting Input INF+
Fine Inverting Input INF-
Rough Inverting Input INR-
Positive Voltage Reference Input VREF+
Negative Voltage Reference Input VREF-
Negative Analog Power Supply VA-
Positive Analog Power Supply VA+
No Internal Connection NC
No Internal Connection NC
No Internal Connection NC
No Internal Connection NC
PWDN Power-down Enable
LPWR Low Power Mode Select
MFLAG Modulator Flag Output
MDATA Modulator Data Output
MSYNC Modulator Sync Input
MCLK Modulator Clock Input
VD Positive Digital Power Supply
DGND Digital Ground
NC No Internal Connection
NC No Internal Connection
OFST Offset Mode Select
VD Positive Digital Power Supply
CS5371 CS5372
DS255F3 17
INF-
_
Fine Inverting Input, pin 3
Fine inverting analog input.
VREF+
_
Positive Voltage Reference Input, pin 5
Input for an external +2.5 V voltage reference relative to VREF-.
VREF-
_
Negative Voltage Reference Input, pin 6
This pin should be tied to VA-.
Digital Inputs
MCLK
_
Modulator Clock Input, pin 19
A CMOS compatible clock input for the modulator internal master clock, nominally 2.048 MHz
with an amplitude equal to the VD digital power supply.
MSYNC
_
Modulator Sync Input, pin 20
A low to high transition resets the internal clock phasing of the modulator. This assures the
sampling instant and modulator data output are synchronous to the external system.
OFST
_
Offset Mode Select, pin 14
When high, adds approximately -50 mV of offset to the analog inputs to guarantee any ∆Σ idle
tones are removed. When low, no offset is added.
LPWR
_
Low Power Mode Select, pin 23
When set high with MCLK operating at 1.024 MHz, modulator power dissipation is reduced to
15 mW per channel.
PWDN
_
Power-down Mode, pin 24
When high, the modulator is in power-down mode and consumes 1 mW. Halting MCLK while
in power down mode reduces modulator power dissipation to 10
µW.
Digital Outputs
MDATA
_
Modulator Data Output, pin 21
Modulator data is output as a 1-bit serial data stream at 512 kHz with an MCLK input of
2.048 MHz. Modulator data is output at 256 kHz with an MCLK input of 1.024 MHz.
MFLAG
_
Modulator Flag Output, pin 22
A high level output indicates the modulator is unstable due to an over-range on the analog
inputs.
CS5371 CS5372
18 DS255F3
11. PIN DESCRIPTION - CS5372
Power Supplies
VA+
_
Positive Analog Power Supply, pin 8
Positive supply voltage.
VA-
_
Negative Analog Power Supply, pin 7
Negative supply voltage.
VD
_
Positive Digital Power Supply, pin 18
Positive supply voltage.
DGND
_
Digital Ground, pin 17
Analog Inputs
INR1+, INR2+
_
Channel 1 & 2 Rough Non-Inverting Inputs, pin 1, 12
Rough non-inverting analog inputs. The rough inputs settle non-linear currents to improve
linearity on the fine inputs and reduce harmonic distortion.
INR1-, INR2-
_
Channel 1 & 2 Rough Inverting Inputs, pin 4, 9
Rough inverting analog inputs. The rough inputs settle non-linear currents to improve linearity
on the fine inputs and reduce harmonic distortion.
INF1+, INF2+
_
Channel 1 & 2 Fine Non-Inverting Input, pin 2, 11
Fine non-inverting analog inputs.
1
2
3
4
5
6
7
817
18
19
20
21
22
23
24
9
10
11
12 13
14
15
16
Ch. 1 Rough Non-Inverting Input INR1+
Ch. 1 Fine Non-Inverting Input INF1+
Ch. 1 Fine Inverting Input INF1-
Ch. 1 Rough Inverting Input INR1-
Positive Voltage Reference Input VREF+
Negative Voltage Reference Input VREF-
Negative Analog Power Supply VA-
Positive Analog Power Supply VA+
Ch. 2 Rough Inverting Input INR2-
Ch. 2 Fine Inverting Input INF2-
Ch. 2 Fine Non-Inverting Input INF2+
Ch. 2 Rough Non-Inverting Input INR2+
PWDN1 Ch. 1 Power-down Enable
LPWR Low Power Mode Select
MFLAG1 Ch. 1 Modulator Flag Output
MDATA1 Ch. 1 Modulator Data Output
MSYNC Modulator Sync Input
MCLK Modulator Clock Input
VD Positive Digital Power Supply
DGND Digital Ground
MDATA2 Ch. 2 Modulator Data Output
MFLAG2 Ch. 2 Modulator Flag Output
OFST Offset Mode Select
PWDN2 Ch. 2 Power-down Enable
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

CS5371-BSZR

Mfr. #:
Buy CS5371-BSZR
Manufacturer:
Cirrus Logic
Description:
Data Acquisition ADCs/DACs - Specialized LP High Performance Delta Sigma Mod.
Lifecycle:
New from this manufacturer.
Delivery:
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