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CS8101YDWFR20G

P1-P3P4-P6P7-P9P10-P11
CS8101
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS (continued) (6.0 V ≤ V
IN
≤ 26 V; I
OUT
= 1.0 mA; −40 ≤ T
A
≤ 125, −40°C ≤ T
J
≤ 150°C,
unless otherwise noted.)
Characteristic UnitMaxTypMinTest Conditions
ENABLE Input (ENABLE)
Threshold
HIGH
LOW
(V
OUT
OFF)
(V
OUT
ON)
−
0.6
1.4
1.4
2.0
−
V
V
Input Current V
ENABLE
= 2.4 V − 30 100
mA
Reset Functions (RESET)
RESET Threshold
HIGH (V
RH
)
LOW (V
RL
)
V
OUT
Increasing
V
OUT
Decreasing
4.525
4.500
4.75
4.70
V
OUT
− 0.05
V
OUT
− 0.075
V
V
RESET Hysteresis (HIGH − LOW) 25 50 100 mV
Reset Output Leakage
RESET = HIGH
V
OUT
≥ V
RH
− − 25
mA
Output Voltage
Low (V
RLO
)
Low (VR
PEAK
)
1.0 V ≤ V
OUT
≤ V
RL,
R
RESET
= 10 k
V
OUT
, Power up, Power down, R
RESET
= 10 k
−
−
0.1
0.6
0.4
1.0
V
V
PACKAGE LEAD DESCRIPTION
PACKAGE LEAD #
SO−20 WB SOIC−8 LEAD SYMBOL FUNCTION
20 1 V
OUT
5.0 V, ±2.0%, 100 mA output.
− 2 V
OUT
SENSE Kelvin connection which allows remote sensing of output voltage for improved
regulation. If remote sensing is not required, connect to V
OUT
.
1 3 ENABLE Logic level switches output off when toggled HIGH.
4, 5, 6, 7
14, 15, 16, 17
4 GND Ground. All GND leads must be connected to Ground.
10 5 RESET Active reset (accurate to V
OUT
≥ 1.0 V)
2, 3, 8, 9, 11,
12, 13, 18
6,7 NC No Connection. True no−connect (i.e. is floating)
19 8 V
IN
Input voltage.
CS8101
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5
TYPICAL PERFORMANCE CHARACTERISTICS
Load (mA)
0 1020304050607080
Figure 2. CS8101 Dropout Voltage vs. Load Over Temperature
0.6
0.5
0.4
0.3
0.2
0.1
0
Dropout Voltage
25°C
90 100
125 C
−40°C
°
CIRCUIT DESCRIPTION
VOLTAGE REFERENCE AND OUTPUT CIRCUITRY
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 3).
Figure 3. Typical Circuit Waveforms for Output
Stage Protection
I
OUT
Load
Dump
V
IN
V
OUT
Current
Limit
Short
Circuit
> 30 V
If the input voltage rises above 30 V (e.g. load dump), the
output shuts down. This response protects the internal
circuitry and enables the IC to survive unexpected voltage
transients.
Should the junction temperature of the power device
exceed 180°C (typ) the load current capability is reduced
thereby preventing thermal overload. This thermal
management function is an effective means to prevent die
overheating since the load current is the principle heat
source in the IC.
REGULATOR CONTROL FUNCTIONS
The CS8101 contains two microprocessor compatible
control functions: ENABLE and RESET (Figure 4).
Figure 4. Circuit Waveform
(1) = No Reset Delay Capacitor
V
IN
V
OUT
ENABLE
RESET
(2) = With Reset Delay Capacitor
VR
LO
VR
PEAK
VR
PEAK
For 7.0 V < V
IN
< 26 V
V
IN(H)
V
RH
V
RL
(1)
(2)
ENABLE Function
The ENABLE function switches the output transistor ON
and OFF. When the voltage on the ENABLE lead exceeds
1.4 V typ, the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 50 mA, until the voltage on this input
drops below the ENABLE threshold.
RESET Function
A RESET signal (low voltage) is generated as the IC
powers up until V
OUT
is within 250 mV of the regulated
output voltage, or when V
OUT
drops out of regulation, and
is lower than 300 mV below the regulated output voltage. A
hysteresis of 50 mV is included in the function to minimize
oscillations.
CS8101
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6
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for V
OUT
as low
as 1.0 V.
Figure 5. RC Network for RESET Delay
V
OUT
CS8101
5.0 V to mP
and System
Power
RESET
R
RST
to mP
RESET
Port
C
RST
C
OUT
An external RC network on the lead (Figure 5) provides
a sufficiently long delay for most microprocessor based
applications. RC values can be chosen using the following
formula:
R
TOT
C
RST
+
ƪ
−t
Delay
ln
ǒ
V
T
*V
OUT
V
RST
*V
OUT
Ǔ
ƫ
where:
R
RST
= RESET Delay resistor
R
IN
= mP port impedance
R
TOT
= R
RST
in parallel with R
IN
C
RST
= RESET Delay capacitor
t
Delay
= desired delay time
V
RST
= V
SAT
of RESET lead (0.7 V @ turn − ON)
V
T
= RESET threshold.
The circuit depicted in Figure 6 lets the microprocessor
control its power source, the CS8101 regulator. An I/O port
on the mP and the SWITCH port are used to drive the base
of Q1. When Q1 is driven into saturation, the voltage on the
ENABLE lead falls below its lower threshold. The
regulator’s output is enabled. When the drive current is
removed, the voltage on the ENABLE lead rises, the output
is switched off and the IC moves into Sleep mode where it
draws 50 mA (max).
By coupling these two controls with the ENABLE lead,
the system has added flexibility. Once the system is running,
the state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The microprocessor can turn off its
own power by withdrawing drive current, once the
SWITCH is open. This software control at the I/O port
allows the microprocessor to finish key housekeeping
functions before power is removed.
The logic options are summarized in Table 1.
Table 1. Logic Control of CS8101 Output
Microprocessor
I/O Drive
Switch ENABLE Output
ON Closed LOW ON
Open LOW ON
OFF Closed LOW ON
Open HIGH OFF
The I/O port of the microprocessor typically provides
50 mA to Q1. In automotive applications the SWITCH is
connected to the ignition switch.
P1-P3P4-P6P7-P9P10-P11

CS8101YDWFR20G

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Buy CS8101YDWFR20G
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5V 100mA MicroPower
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