ADG1236 Data Sheet
Rev. A | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
DD
to V
SS
35 V
V
DD
to GND 0.3 V to +25 V
V
SS
to GND +0.3 V to 25 V
Analog Inputs
1
V
SS
0.3 V to V
DD
+ 0.3 V or
30 mA, whichever occurs first
Digital Inputs
1
GND 0.3 V to V
DD
+ 0.3 V or
30 mA, whichever occurs first
Peak Current, S or D 100 mA (pulsed at 1 ms,
10% duty cycle max)
Continuous Current per
Channel, S or D
25 mA
Operating Temperature Range
Automotive (Y Version)
40°C to +125°C
Storage Temperature Range 65°C to +150°C
Junction Temperature 150°C
16-Lead TSSOP, θ
JA
Thermal
Impedance
112°C/W
12-Lead LFCSP, θ
JA
Thermal
Impedance
80°C/W
Reflow Soldering Peak
Temperature, Pb Free
260°C
1
Over voltages at IN, S, or D are clamped by internal diodes. Current must be
limited to the maximum ratings given.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
TRUTH TABLE FOR SWITCHES
Table 4.
IN Switch A Switch B
0 Off On
1 On Off
Data Sheet ADG1236
Rev. A | Page 7 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN1
S1A
D1
S1B
V
SS
GND
NC
NC
NC
NC
NC
V
DD
S2B
D2
S2A
IN2
04776-002
1
2
3
4
5
6
7
8
NC = NO CONNECT. DO NOT CONNECT
T
O THIS PIN.
16
15
14
13
12
11
10
9
ADG1236
TOP VIEW
(Not to Scale)
Figure 2. TSSOP Pin Configuration
NOTES
1. NC = NO CONNECT. DO NOT CONNECT
TO THIS PIN.
2. THE EXPOSED PAD MUST BE TIED
TO SUBSTRATE,
V
SS
.
04776-003
9
8
7
1
2
3
V
DD
S2B
D2
D1
S1B
V
SS
4
GND
5
IN2
6
S2A
12
S1A
11
IN1
10
NC
ADG1236
TOP VIEW
(Not to Scale)
Figure 3. LFCSP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 11 IN1 Logic Control Input.
2 12 S1A Source Terminal. Can be an input or output.
3 1 D1 Drain Terminal. Can be an input or output.
4 2 S1B Source Terminal. Can be an input or output.
5 3 V
SS
Most Negative Power Supply Potential.
6 4 GND Ground (0 V) Reference.
7, 8, 14 to 16 10 NC No Connect.
9 5 IN2 Logic Control Input.
10 6 S2A Source Terminal. Can be an input or output.
11 7 D2 Drain Terminal. Can be an input or output.
12 8 S2B Source Terminal. Can be an input or output.
13 9 V
DD
Most Positive Power Supply Potential.
ADG1236 Data Sheet
Rev. A | Page 8 of 16
TERMINOLOGY
I
DD
The positive supply current.
I
SS
The negative supply current.
V
D
(V
S
)
The analog voltage on Terminals D and S.
R
ON
The ohmic resistance between D and S.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
I
S
(Off)
The source leakage current with the switch off.
I
D
(Off)
The drain leakage current with the switch off.
I
D
, I
S
(On)
The channel leakage current with the switch on.
V
INL
The maximum input voltage for Logic 0.
V
INH
The minimum input voltage for Logic 1.
I
INL
(I
INH
)
The input current of the digital input.
C
S
(Off)
The off switch source capacitance, measured with reference to
ground.
C
D
(Off)
The off switch drain capacitance, measured with reference to
ground.
C
D
, C
S
(On)
The on switch capacitance, measured with reference to ground.
C
IN
The digital input capacitance.
t
TRANS
The delay time between the 50% and 90% points of the digital
input and switch on condition when switching from one
address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental.

ADG1236YRUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs IC 80dB 120 Ohm iCMOS Dual SPST
Lifecycle:
New from this manufacturer.
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