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LT3517IFE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LT3517
4
3517fh
For more information www.linear.com/LT3517
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2) V
IN
= 5V, SHDN = 5V, PWM = 5V unless otherwise noted.
typical perForMance characteristics
V
ISP
– V
ISN
Threshold vs V
CTRL
Switch Current Limit
vs Duty Cycle
Oscillator Frequency vs R
T
V
CTRL
(V)
0
0
V
ISP
– V
ISN
THRESHOLD (mV)
20
40
60
80
0.4 0.8
1.2
1.6
3518 G01
100
120
0.2 0.6
1.0
1.4
V
IN
= 5V
V
ISP
= 24V
VC = 1V
T
A
= 25°C
R
T
(kΩ)
1
100
OSCILLATOR FREQUENCY (kHz)
1000
10000
10 100
3518 G03
T
A
= 25°C
DUTY CYCLE (%)
0
0
SWITCH CURRENT LIMIT (A)
0.5
1.0
1.5
2.0
20 40 60 80
3517 G02
100
T
A
= 25°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3517E is guaranteed to meet performance specifications
from 0°C to 125°C operating junction temperature range. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical
process controls. The LT3517I is guaranteed over the full –40°C to 125°C
operating junction temperature range. The LT3517H is guaranteed over
the full –40°C to 150°C operating junction temperature range. Operating
lifetime is derated at junction temperatures greater than 125°C.
electrical characteristics
PARAMETER CONDITIONS MIN TYP MAX UNITS
TGEN Input High Voltage 1.5 V
TGEN Input Low Voltage 0.4 V
TGEN Pin Bias Current TGEN = 5V 100 200 µA
V
REF
Pin Voltage I
REF
= –100µA
l
1.96 2 2.04 V
V
REF
Pin Voltage Line Regulation 3V < V
IN
< 40V 0.03 %/V
Gate Turn-On Delay C
LOAD
= 1nF Between ISP and TG 200 ns
Gate Turn-Off Delay C
LOAD
= 1nF Between ISP and TG 200 ns
Top Gate Drive V
GS
(V
ISP
– V
TG
) V
ISP
= 24V, TGEN = 5V
PWM = 0V
7
0
0.3
V
V
Note 3:
Absolute maximum voltage at V
IN
, SHDN, PWM and TGEN pins
is 40V for nonrepetitive 1 second transients and 30V for continuous
operation.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability.
LT3517
5
3517fh
For more information www.linear.com/LT3517
V
ISP
– V
ISN
Threshold
vs Temperature
Switch Current Limit
vs Temperature
Oscillator Frequency
vs Temperature
Reference Voltage
vs Temperature
Quiescent Current vs V
IN
TEMPERATURE (°C)
–40
V
ISP
– V
ISN
THRESHOLD (mV)
103
20
3517 G04
100
98
–20 0 40
97
96
104
102
101
99
60 80 100 120 140 160
V
IN
= 5V
V
ISP
= 24V
VC = 1V
V
CTRL
= 2V
TEMPERATURE (°C)
–40 –20
1.5
OSCILLATOR FREQUENCY (MHz)
1.9
2.5
0
40
60
3517 G06
1.7
2.3
2.1
20
80
160100 120 140
V
IN
= 5V
R
T
= 6.04k
V
ISP
(V)
0
V
ISP
– V
ISN
THRESHOLD (mV)
101
103
105
40
3517 G07
99
97
100
102
104
98
96
95
10
20
30
50
V
CTRL
= 2V
V
IN
= 5V
T
A
= 25°C
VC = 1V
TEMPERATURE (°C)
–40
1.98
V
REF
(V)
1.99
2.00
2.01
2.02
–20 0 20 40
3517 G08
60 80 100 120 140 160
V
IN
= 5V
V
IN
(V)
0
V
IN
CURRENT (mA)
4
5
6
40
3517 G09
3
2
0
10
20
30
1
8
7
T
A
= 25°C
VC = 0V
V
ISP
– V
ISN
Threshold vs V
ISP
typical perForMance characteristics
FB Pin Threshold vs Temperature
PMOS Turn-On PMOS Turn-Off
TEMPERATURE (°C)
–40
0.98
FB PIN THRESHOLD (V)
1.00
0.99
1.01
1.03
1.02
1.04
–20 0 20 40
3517 G10
60 80 140 160100 120
V
IN
= 5V
5V
PWM
0V
40V
TG
30V
200ns/DIVV
ISP
= 40V
3517 G11
5V
PWM
0V
40V
TG
30V
200ns/DIVV
ISP
= 40V
3517 G11
TEMPERATURE (°C)
–40 –20
0
SWITCH CURRENT LIMIT (A)
1.0
2.5
0
40
60
3518 G05
0.5
2.0
1.5
20
80 100 120 140 160
V
IN
= 5V
LT3517
6
3517fh
For more information www.linear.com/LT3517
pin Functions
SW: Switch Pin. Minimize trace at this pin to reduce EMI.
V
IN
: Input Supply Pin. Must be locally bypassed.
SHDN: Shutdown Pin. Tie to 1.5V or higher to enable
device or 0.4V or less to disable device.
V
REF
: Reference Output Pin. This pin can supply up to
100µA.
RT : Switching Frequency Adjustment Pin. Set switching
frequency using a resistor to GND (see Typical Performance
Characteristics for values). For SYNC function, choose
the resistor to program a frequency 20% slower than the
SYNC pulse frequency. Do not leave this pin open.
SYNC: Frequency Synchronization Pin. Tie an external
clock signal here. R
T
resistor should be chosen to pro-
gram a switching frequency 20% slower than SYNC pulse
frequency. Synchronization (power switch turn-on) occurs
a fixed delay after the rising edge of SYNC. Tie the SYNC
pin to ground if this feature is not used.
SS: Soft-Start Pin. Place a soft-start capacitor here. Leave
the pin open if not in use.
PWM: Pulse Width Modulated Input Pin. Signal low turns
off channel, disables the main switch and makes the TG
pin high. Tie the PWM pin to V
REF
pin or SHDN pin if not
used. There is an equivalent 50k resistor from PWM pin
to ground internally.
CTRL: LED Current Adjustment Pin. Sets voltage across
sense resistor between ISP and ISN. Connect directly to
V
REF
for full-scale threshold of 100mV, or use signal values
between GND and 1V to modulate LED current. Tie the CTRL
pin to the V
REF
pin if not used.
VC: g
m
Error Amplifier Output Pin. Stabilize the loop with
an RC network or compensating C.
FB: Voltage Loop Feedback Pin. Works as overvoltage
protection for LED drivers. If FB is higher than 1V, the
main switch is turned off.
TGEN: Top Gate Enable Input Pin. Tie to 1.5V or higher
to enable the PMOS driver function. Tie the TGEN pin to
ground if TG function is not used. There is an equivalent
40k resistor from TGEN pin to ground internally.
ISN: Current Sense (–) Pin. The inverting input to the
current sense amplifier.
ISP: Current Sense (+) Pin. The noninverting input to the
current sense amplifier. Also serves as positive rail for
TG pin driver.
TG: Top Gate Driver Output. An inverted PWM sig
-
nal drives series PMOS device between V
ISP
and
(V
ISP
– 7V). An internal 7V clamp protects the PMOS gate.
Leave TG unconnected if not used.
GND: Exposed Pad (QFN Package). Solder paddle directly
to ground plane.
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LT3517IFE#TRPBF

Mfr. #:
Buy LT3517IFE#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
LED Lighting Drivers 2.3A/1.3A, 45V, 2.5MHz Full Featured LED Driver w/ True Color PWM Dimming
Lifecycle:
New from this manufacturer.
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