LT3467/LT3467A
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TYPICAL PERFORMANCE CHARACTERISTICS
Current Limit vs Duty Cycle
Switch Saturation Voltage
vs Switch Current
Oscillator Frequency
vs Temperature
Soft-Start Current
vs Soft-Start Voltage
Peak Switch Current
vs Soft-Start Voltage
Start-Up Waveform
(Figure 2 Circuit)
Quiescent Current vs Temperature FB Pin Voltage vs Temperature SHDN Current vs SHDN Voltage
I
Q
(mA)
TEMPERATURE (°C)
–40 95 110
3467 G01
5–10 50
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–25 3520 65 80 125
V
FB
(V)
TEMPERATURE (°C)
–40 95 110
3467 G02
5–10 50
1.26
1.25
1.24
1.23
1.22
1.21
1.20
–25 3520 65 80 125
V
SHDN
(V)
0
I
SHDN
(μA)
8
140
120
100
80
60
40
20
0
3467 G03
41612
2
10
61814
T
A
= 25°C
DC (%)
10
I
LIM
(A)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
30
50
60
3467 G04
20 40
70
80
90
TYPICAL
GUARANTEED
T
A
= 25°C
V
CESAT
100mV/DIV
SW CURRENT 200mA/DIV
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
3467 G05
TEMPERATURE (°C)
–50
OSCILLATOR FREQUENCY (MHz)
100
3467 G06
050–25 25 75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
LT3467A
LT3467
V
SS
(mV)
0 50 150 250 350 450
I
SS
(μA)
6
5
4
3
2
1
0
100 200 300 400
3467 G07
500
T
A
= 25°C
V
SS
(mV)
0 50 150 250 350 450
SWITCH CURRENT (A)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
100 200 300 400
3467 G08
500
T
A
= 25°C
V
SHDN
2V/DIV
V
OUT
1V/DIV
I
SUPPLY
0.5A/DIV
0.5ms/DIV
3467 G09
LT3467/LT3467A
5
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PIN FUNCTIONS
(DFN/TSOT)
FB (Pin 1/Pin 3): Feedback Pin. Reference voltage is 1.255V.
Connect resistive divider tap here. Minimize trace area at
FB. Set V
OUT
= 1.255V(1 + R1/R2).
GND (Pins 2, 5, 9/Pin 2): Ground. Tie directly to local
ground plane.
SW (Pins 3, 4/Pin 1): Switch Pin. (Collector of internal
NPN power switch) Connect inductor/diode here and
minimize the metal trace area connected to this pin to
minimize EMI.
V
IN
(Pin 6/Pin 6): Input Supply Pin. Must be locally
bypassed.
SS (Pin 7/Pin 5): Soft-Start Pin. Place a soft-start capacitor
here. Upon start-up, 4μA of current charges the capacitor
to 1.255V. Use a larger capacitor for slower start-up. Leave
oating if not in use.
SHDN (Pin 8/Pin 4): Shutdown Pin. Tie to 2.4V or more
to enable device. Ground to shut down.
BLOCK DIAGRAM
+
+
RQ
S
0.01Ω
SW
DRIVER
COMPARATOR
SHDN
V
IN
SS
FB
+
3
RAMP
GENERATOR
1.255V
REFERENCE
R
C
C
C
1.3MHz
OSCILLATOR*
GND
3467 F01
Q1
A2
A1
R1 (EXTERNAL)
R2 (EXTERNAL)
FB
V
OUT
SHUTDOWN
250k
*2.1MHz FOR LT3467A
Figure 1. Block Diagram
LT3467/LT3467A
6
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APPLICATIONS INFORMATION
OPERATION
The LT3467 uses a constant frequency, current-mode con-
trol scheme to provide excellent line and load regulation.
Refer to the Block Diagram. At the start of each oscillator
cycle, the SR latch is set which turns on the power switch
Q1. A voltage proportional to the switch current is added
to a stabilizing ramp and the resulting sum is fed into the
positive terminal of the PWM comparator A2. When this
voltage exceeds the level at the negative input of A2, the
SR latch is reset, turning off the power switch. The level
at the negative input of A2 is set by the error amplifi er A1,
and is simply an amplifi ed version of the difference between
the feedback voltage and the reference voltage of 1.255V.
In this manner, the error amplifi er sets the correct peak
current level to keep the output in regulation. If the error
amplifi ers output increases, more current is delivered to
the output. Similarly, if the error decreases, less current
is delivered. The soft-start feature of the LT3467 allows
for clean start-up conditions by limiting the rate of voltage
rise at the output of comparator A1 which, in turn, limits
the peak switch current. The soft-start pin is connected
to a reference voltage of 1.255V through a 250k resistor,
providing 4μA of current to charge the soft-start capacitor.
Typical values for the soft-start capacitor range from 10nF
to 200nF. The LT3467 has a current limit circuit not shown
in the Block Diagram. The switch current is constantly
monitored and not allowed to exceed the maximum switch
current (typically 1.4A). If the switch current reaches
this value, the SR latch is reset regardless of the state
of comparator A2. This current limit protects the power
switch as well as the external components connected to
the LT3467.
The Block Diagram for the LT3467A (not shown) is identical
except that the oscillator frequency is 2.1MHz.
Duty Cycle
The typical maximum duty cycle of the LT3467 is 94%
(88% for the LT3467A). The duty cycle for a given ap-
plication is given by:
DC =
|V
OUT
|+|V
D
|–|V
IN
|
|V
OUT
|+|V
D
|–|V
CESAT
|
where V
D
is the diode forward voltage drop and V
CESAT
is
in the worst case 330mV (at 1.1A)
The LT3467 and LT3467A can be used at higher duty cycles,
but must be operated in the discontinuous conduction
mode so that the actual duty cycle is reduced.
Setting Output Voltage
R1 and R2 determine the output voltage.
V
OUT
= 1.255V (1+ R1/R2)
Switching Frequency and Inductor Selection
The LT3467 switches at 1.3 MHz, allowing for small valued
inductors to be used. 4.7μH or 10μH will usually suffi ce.
The LT3467A switches at 2.1MHz, allowing for even smaller
valued inductors to be used. 0.9μH to 6.8μH will usually
suffi ce. Choose an inductor that can handle at least 1.2A
without saturating, and ensure that the inductor has a
low DCR (copper-wire resistance) to minimize I
2
R power
losses. Note that in some applications, the current handling
requirements of the inductor can be lower, such as in the
SEPIC topology where each inductor only carries one-half
of the total switch current. For better effi ciency, use similar
valued inductors with a larger volume. Many different sizes
and shapes are available from various manufacturers.
Choose a core material that has low losses at 1.3MHz,
(2.1MHz for the LT3467A) such as ferrite core.

LT3467AEDDB

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators LT3467A - 1.1A Step-Up DC/DC Converter with Integrated Soft-Start
Lifecycle:
New from this manufacturer.
Delivery:
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