Document Number: T1024FS REV 2
© 2014-2015 Freescale Semiconductor, Inc.
CodeWarrior, QorlQ and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. CoreNet and QUICC
Engine are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks
and service marks licensed by Power.org.
www.nxp.com/QorIQ
QorIQ T1023/24 PROCESSORS FEATURES LIST
Two or four e5500 single-threaded
cores built on Power Architecture
technology
• Up to 1.4 GHz with 64-bit ISA support
• Low latency, per core, core clocked 256 KB dedicated cache
• Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
• Nap, wait and doze low-power modes
CoreNet platform cache • 256 KB shared platform cache for stashing support
Hierarchical interconnect fabric • CoreNet fabric supporting coherent and non-coherent transactions with prioritization and
bandwidth allocation amongst CoreNet endpoints
• QMAN fabric supporting packet-level queue management and quality of service
64-bit DDR3L/4 SDRAM memory
controller with ECC support
• 32-bit or 64-bit low power DDR up to 1600 MT/s
DPAA incorporating acceleration for
the following functions
• Full L2/3 tunneling and en/decrypt offload support for functions such as WLAN
• CAPWAP/DTLS secure wired links
• Packet parsing, classification and distribution
• Queue management for scheduling, packet sequencing and congestion management
• Hardware buffer management for buffer allocation and de-allocation
• Cryptography acceleration (SEC 5.x)
SerDes • Four lanes at up to 10 Gbit/s
• Supports SGMII, 2.5 Gbit SGMII, QSGMII, XFI, 10G BASE-KR, PCI Express
®
and SATA
Ethernet interfaces • Up to 4 x Ethernet MACs
QUICC Engine module • Integrated support for legacy WAN protocols TDM, HDLC, UART, ISDN and industrial
protocols
High-speed
peripheral interfaces
• Three PCI Express 2.0 controller
Additional peripheral interfaces • One serial ATA (SATA 2.0) controller
• Two high-speed USB 2.0 controllers with integrated PHYs
• Enhanced secure digital host controller (SD/MMC/eMMC)
• Enhanced serial peripheral interface
• Two I
2
C controllers
• Four UARTS
• Integrated flash controller supporting NAND and NOR flash memory
DMA • Dual four channel
Support for hardware virtualization
and partitioning enforcement
• Extra privileged level for hypervisor support
QorIQ trust architecture • Secure boot, secure debug, tamper detection, volatile key storage
Single source clocking • For BOM cost reduction