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dissipated by the MOSFET, in order for the load to
change state.
To calculate the stored inductive energy in Joules:
6.1 Resistive Load Losses: The Ideal Case
For purely resistive loads, the energy dissipated by
changing states occurs primarily in the MOSFET.
The equation describing MOSFET energy dissipation
during rise time, in Joules, is:
The average power of the MOSFET for any load type
in Watts is:
Where f
SWITCH
is the application switching frequency;
R
DSAT
is the MOSFET’s on-resistance; D is the
switch's operational duty cycle: D = t
on
/(t
on
+t
off
); and
E
FALL
is MOSFET energy dissipation during fall time,
in Joules.
6.2 Inductive/Resistive Loads
If the load is resistive and inductive, and the
inductance doesn't saturate, the load current during
turn off, t
RISE
, in Amps is:
and the MOSFET drain voltage during turn off, t
RISE
,
in Volts is:
The instantaneous power in the MOSFET will be the
product of the two equations and the energy will be the
integral of the power over time.
6.3 Capacitive Loads
The energy absorbed by the MOSFET for loads that
are more capacitive in nature occurs during the
MOSFET turn-on as opposed to the turn-off. The
energy absorbed by the MOSFET will be a function of
the load, the TVS (or other protector), and the
MOSFET drain capacitance. The MOSFET energy,
E
FALL
, in Joules is:
C
OSS
is the MOSFET output capacitance found in the
data sheet. As mentioned earlier, the MOSFET
switching losses occur at different times, either rising
or falling, so loads with a combination of inductance
and capacitance can also be calculated by the energy
equations described above.
6.4 dV/dt Characteristics
The application circuit shown in Figure 1 dissipates
significant energy caused by large dV/dt events. Fault
voltages across the MOSFET will turn it on for the
same reason the part turns off slowly. For dV/dt events
> I
G_SINK
/C
RSS
(from Equation 2) the application
circuit will dissipate energy proportional to the C
RSS
and g
FS
(forward conductance) of the selected
transistor. C
RSS
is a function of the transistor's
on-resistance and current/power capability, so higher
load designs are more sensitive.
The CPC1580 provides an internal clamp to protect
the gate of the MOSFET from damage in such an
event. The part can withstand 100mA for short
periods, like dV/dt transients.
7. Design Switching Frequency
The maximum switching frequency is the last design
value to be calculated, because the over-voltage
protection and the storage capacitor play a significant
role in determining the result. Inasmuch as those
factors are already determined, the following gives a
good approximation for the maximum switching
frequency. The maximum switching frequency is a
function of the gate charge of the MOSFET, the
storage capacitor (C
ST
), and R
OVP
. The maximum
switching frequency relationship in Hz is:
Where:
E
L
=
• L • I
LOAD
2
1
2
E
RISE
>
V
LOAD
2
I
G_SINK
C
RSS
I
LOAD
6
=
P
LOAD
6
t
RISE
P
AVG
=
I
LOAD
2
•• R
DSAT
D + f
SWITCH
(E
RISE
+ E
FALL
)
I
LOAD
(t) =
V
LOAD
R
LOAD
I
G_SINK
L
LOAD
• C
RSS
-
()
R
LOAD
L
LOAD
t - 1 + e
-R
LOAD
L
LOAD
•t
2
R
LOAD
L
LOAD
][
V
DRAIN
(t) =
I
G_SINK
C
RSS
t
E
FALL
=
1
2
•(C
TVS
+ C
OSS
+ C
LOAD
)•
V
LOAD
2
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M=3 (multiplication factor for temperature and pro-
cess variations
t
on
and t
off
are CPC1580 data sheet parameters
t
RISE, VD
is the rise time of the drain voltage and t
CHG
is the charge time of the storage capacitor and the
over-voltage protection circuitry as derived in
Section 4.3: choose the greater of t
RISE,VD
or t
CHG
for the calculation
t
FALL,VD
is the fall time across the transistor
There is no minimum switching frequency since the
CPC1580 uses photovoltaic diodes to keep the output
charged while LED current flows.
f
MAX
<
1
M
(t
on
+ t
off
+ (t
RISE,VD
| t
CHG)
+ t
FALL,VD
)
-1
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8. Manufacturing Information
8.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and information in that standard as well as
to any limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
8.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
8.3 Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of
J-STD-020 must be observed.
8.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable. Since IXYS Integrated Circuits Division employs the use of silicone coating as an
optical waveguide in many of its optically isolated products, the use of a short drying bake could be necessary if a
wash is used after solder reflow processes. Chlorine- or Fluorine-based solvents or fluxes should not be used.
Cleaning methods that employ ultrasonic energy should not be used..
Device Moisture Sensitivity Level (MSL) Rating
CPC1580 MSL 1
Device Maximum Temperature x Time
CPC1580 260°C for 30 seconds
e
3
Pb

CPC1580P

Mfr. #:
Manufacturer:
IXYS Integrated Circuits
Description:
Logic Output Optocouplers Optically Isolated Gate Driver
Lifecycle:
New from this manufacturer.
Delivery:
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