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NSR05F40QNXT5G

P1-P3P4-P6P7-P9P10-P10
© Semiconductor Components Industries, LLC, 2013
December, 2013 − Rev. P0
1 Publication Order Number:
CAV93C66/D
CAV93C66
4 Kb Microwire Serial CMOS
EEPROM
Description
The CAV93C66 is a 4 Kb CMOS Serial EEPROM device which is
organized as either 256 registers of 16 bits (ORG pin at V
CC
) or 512
registers of 8 bits (ORG pin at GND). Each register can be written (or
read) serially by using the DI (or DO) pin. The device features
sequential read and self−timed internal write with auto−clear. On−chip
Power−On Reset circuitry protects the internal logic against powering
up in the wrong state.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• High Speed Operation: 2 MHz
• 2.5 V to 5.5 V Supply Voltage Range
• Selectable x8 or x16 Memory Organization
• Self−timed Write Cycle with Auto−clear
• Sequential Read
• Software Write Protection
• Power−up Inadvertent Write Protection
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• 8−lead SOIC and TSSOP Packages
• These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
ORG
DO
CAV93C66
SK
GND
V
CC
Figure 1. Functional Symbol
DI
CS
Note: When the ORG pin is connected to V
CC
, the x16 organization is
selected. When it is connected to ground, the x8 organization is
selected. If the ORG pin is left unconnected, then an internal pull−up
device will select the x16 organization.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
PIN CONFIGURATIONS
GND
NC
V
CC
DO
DI
SK
CS
1
SOIC−8
V SUFFIX
CASE 751BD
ORG
SOIC (V), TSSOP (Y)
(Top View)
TSSOP−8
Y SUFFIX
CASE 948AL
Chip SelectCS
Clock InputSK
Serial Data InputDI
Serial Data OutputDO
Power SupplyV
CC
GroundGND
FunctionPin Name
PIN FUNCTION
Memory OrganizationORG
No ConnectionNC
CAV93C66
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2
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Storage Temperature −65 to +150 °C
Voltage on Any Pin with Respect to Ground (Note 1) −0.5 to +6.5 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V
CC
+ 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than −1.5 V or overshoot to no more than V
CC
+ 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol Parameter Min Units
N
END
(Note 3) Endurance 1,000,000 Program / Erase Cycles
T
DR
Data Retention 100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
3. Block Mode, V
CC
= 5 V, 25°C.
Table 3. D.C. OPERATING CHARACTERISTICS (V
CC
= +2.5 V to +5.5 V, T
A
=−40°C to +125°C unless otherwise specified.)
Symbol
Parameter Test Conditions Min Max Units
I
CC1
Supply Current (Write) V
CC
= 5.0 V 1 mA
I
CC2
Supply Current (Read) DO open, f
SK
= 2 MHz, V
CC
= 5.0 V 500
mA
I
SB1
Standby Current
(x8 Mode)
V
IN
= GND or V
CC
CS = GND, ORG = GND
5
mA
I
SB2
Standby Current
(x16 Mode)
V
IN
= GND or V
CC
CS = GND,
ORG = Float or V
CC
3
mA
I
LI
Input Leakage Current V
IN
= GND to V
CC
2
mA
I
LO
Output Leakage Current V
OUT
= GND to V
CC
CS = GND 2
mA
V
IL1
Input Low Voltage 4.5 V ≤ V
CC
< 5.5 V −0.1 0.8 V
V
IH1
Input High Voltage 4.5 V ≤ V
CC
< 5.5 V 2 V
CC
+ 1 V
V
IL2
Input Low Voltage 2.5 V ≤ V
CC
< 4.5 V 0 V
CC
x 0.2 V
V
IH2
Input High Voltage 2.5 V ≤ V
CC
< 4.5 V V
CC
x 0.7 V
CC
+ 1 V
V
OL1
Output Low Voltage 4.5 V ≤ V
CC
< 5.5 V, I
OL
= 3 mA 0.4 V
V
OH1
Output High Voltage
4.5 V ≤ V
CC
< 5.5 V, I
OH
= −400 mA
2.4 V
V
OL2
Output Low Voltage 2.5 V ≤ V
CC
< 4.5 V, I
OL
= 1 mA 0.2 V
V
OH2
Output High Voltage
2.5 V ≤ V
CC
< 4.5 V, I
OH
= −100 mA
V
CC
− 0.2 V
Table 4. PIN CAPACITANCE (T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0 V)
Symbol Test Conditions Min Typ Max Units
C
OUT
(Note 4) Output Capacitance (DO) V
OUT
= 0 V 5 pF
C
IN
(Note 4) Input Capacitance (CS, SK, DI, ORG) V
IN
= 0 V 5 pF
4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
CAV93C66
http://onsemi.com
3
Table 5. POWER−UP TIMING (Notes 5, 6)
Symbol
Parameter Max Units
t
PUR
Power−up to Read Operation 1 ms
t
PUW
Power−up to Write Operation 1 ms
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate
AEC−Q100 and JEDEC test methods.
6. t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
Table 6. A.C. TEST CONDITIONS
Input Rise and Fall Times ≤ 50 ns
Input Pulse Voltages 0.4 V to 2.4 V 4.5 V ≤ V
CC
≤ 5.5 V
Timing Reference Voltages 0.8 V, 2.0 V 4.5 V ≤ V
CC
≤ 5.5 V
Input Pulse Voltages 0.2 V
CC
to 0.7 V
CC
2.5 V ≤ V
CC
≤ 4.5 V
Timing Reference Voltages 0.5 V
CC
2.5 V ≤ V
CC
≤ 4.5 V
Output Load Current Source I
OLmax
/I
OHmax
; CL = 100 pF
Table 7. A.C. CHARACTERISTICS (V
CC
= +2.5 V to +5.5 V, TA = −40°C to +125°C, unless otherwise specified.)
Symbol
Parameter Min Max Units
t
CSS
CS Setup Time 50 ns
t
CSH
CS Hold Time 0 ns
t
DIS
DI Setup Time 100 ns
t
DIH
DI Hold Time 100 ns
t
PD1
Output Delay to 1 0.25
ms
t
PD0
Output Delay to 0 0.25
ms
t
HZ
(Note 7) Output Delay to High−Z 100 ns
t
EW
Program/Erase Pulse Width 5 ms
t
CSMIN
Minimum CS Low Time 0.25
ms
t
SKHI
Minimum SK High Time 0.25
ms
t
SKLOW
Minimum SK Low Time 0.25
ms
t
SV
Output Delay to Status Valid 0.25
ms
SK
MAX
Maximum Clock Frequency DC 2000 kHz
7. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate
AEC−Q100 and JEDEC test methods.
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NSR05F40QNXT5G

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Manufacturer:
ON Semiconductor
Description:
Schottky Diodes & Rectifiers 0402 FC SCHOTTKY DIODES
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