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TC7W74FU,LF

P1-P3P4-P6P7-P8
TC7W74FU/FK
2014-11-18
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7W74FU, TC7W74FK
D-Type Flip Flop with Preset and Clear
The TC7W74 is a high speed C
2
MOS D Flip Flop fabricated
with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the C
2
MOS low power dissipation.
The signal level applied to the D INPUT is transferred to Q
OUTPUT during the positive going transition of the CLOCK pulse
CLEAR and PRESET are independent of the CLOCK and are
accomplished by setting the appropriate input to an “L” level
Input is equipped with protection circuits against static discharge
or transient excess voltage.
Features
• High speed: f
MAX
= 77 MHz (typ.) at V
CC
= 5 V
• Low power dissipation: I
CC
= 2 µA (max) at Ta = 25°C
• High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I
OH
| = I
OL
= 4 mA (min)
• Balanced propagation delays: t
pLH
∼
−
t
pHL
• Wide operating voltage range: V
CC
(opr) = 2 to 6 V
Marking
TC7W74FU
(SM8)
TC7W74FK
(US8)
Weight
SSOP8
-P-0.65: 0.02 g (typ.)
SSOP8-P-0.50A: 0.01 g (typ.)
TC
7W74FU
Lot No.
Part No.
7 W 7 4
TC
7W74FK
W
7 4
Start of commercial production
1992-
02
TC7W74FU/FK
2014-11-18
2
Absolute Maximum Ratings (Ta
=
25°C)
Characteristics Symbol Rating Unit
Supply voltage range V
CC
−0.5 to 7 V
DC input voltage V
IN
−0.5 to V
CC
+ 0.5 V
DC output voltage V
OUT
−0.5 to V
CC
+ 0.5 V
Input diode current I
IK
±20 mA
Output diode current I
OK
±20 mA
DC output current I
OUT
±25 mA
DC V
CC
/ground current I
CC
±25 mA
Power dissipation P
D
300 (SM8)
mW
200 (US8)
Storage temperature range T
stg
−65 to 150 °C
Lead temperature (10 s) T
L
260 °C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Pin Configuration (top view)
Logic Diagram
CLR
6
PR
7
1
CK
2
D
4
GND
V
CC
8
Q
5
3
Q
S
C
D
R
PR
CK
Q
(7)
(1)
(5)
CLR
Q
(2)
(6)
(3)
D
TC7W74FU/FK
2014-11-18
3
Truth Table
Inputs Outputs
Function
CLR
PR
D CK Q
Q
L H X X L H Clear
H L X X H L Preset
L L X X H H
H H L
L H
H H H
H L
H H
X
Qn
nQ
No Change
Operating Ranges
Characteristics Symbol Rating Unit
Supply voltage V
CC
2 to 6 V
Input voltage V
IN
0 to V
CC
V
Output voltage V
OUT
0 to V
CC
V
Operating temperature range T
opr
−40 to 85 °C
Input rise and fall time t
r
, t
f
0 to 1000 (V
CC
= 2.0 V)
ns
0 to 500 (V
CC
= 4.5 V)
0 to 400 (V
CC
= 6.0 V)
Electrical Characteristics
DC Electrical Characteristics
Characteristics Symbol Test Condition
Ta = 25°C
Ta = −40
to 85°C
Unit
V
CC
(V)
Min Typ. Max Min Max
Input voltage
High level V
IH
2.0 1.5 1.5
V
4.5 3.15 3.15
6.0 4.2 4.2
Low level V
IL
2.0 0.5 0.5
4.5 1.35 1.35
6.0 1.8 1.8
Output
voltage
High level V
OH
V
IN
=
V
IH
or V
IL
I
OH
= −20 µA
2.0 1.9 2.0 1.9
V
4.5 4.4 4.5 4.4
6.0 5.9 6.0 5.9
I
OH
= −4 mA 4.5 4.18 4.31 4.13
I
OH
= −5.2 mA 6.0 5.68 5.80 5.63
Low level V
OL
V
IN
=
V
IH
or V
IL
I
OL
= 20 µA
2.0 0 0.1 0.1
4.5 0 0.1 0.1
6.0 0 0.1 0.1
I
OL
= 4 mA 4.5 0.17 0.26 0.33
I
OL
= 5.2 mA 6.0 0.18 0.26 0.33
Input leakage current I
IN
V
IN
= V
CC
or GND 6.0 ±0.1 ±1.0 µA
Quiescent supply current I
CC
V
IN
= V
CC
or GND 6.0 2.0 20.0 µA
P1-P3P4-P6P7-P8

TC7W74FU,LF

Mfr. #:
Buy TC7W74FU,LF
Manufacturer:
Toshiba
Description:
Flip Flops x34 D FLIP-FLOP
Lifecycle:
New from this manufacturer.
Delivery:
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