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8:2 Slave address–7 bits 8:2 Slave address–7 bits
9Write 9Write
10 Acknowledge from slave 10 Acknowledge from slave
18:11 Command Code–8 bits 18:11 Command Code–8 bits
19 Acknowledge from slave 19 Acknowledge from slave
27:20 Data byte–8 bits 20 Repeated start
28 Acknowledge from slave 27:21 Slave address–7 bits
29 Stop 28 Read
29 Acknowledge from slave
37:30 Data from slave–8 bits
38 NOT Acknowledge
39 Stop
Byte 0: Control Register 0
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 1 Spread Enable Enable spread for SRC outputs
0=Disable, 1= -0.5%
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Table 3. Byte Read and Byte Write Protocol
Byte 1: Control Register 1
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 1 SRC0_OE Output enable for SRC0
0 = Output Disabled, 1 = Output Enabled
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 1 SRC1_OE Output enable for SRC1
0 = Output Disabled, 1 = Output Enabled
2 1 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 2: Control Register 2
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
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1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 2: Control Register 2 (continued)
Bit @Pup Name Description
Byte 3: Control Register 3
Bit @Pup Name Description
7 1 SRC4_OE Output enable for SRC4
0 = Output Disabled, 1 = Output Enabled
6 1 SRC5_OE Output enable for SRC5
0 = Output Disabled, 1 = Output Enabled
5 0 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 4: Control Register 4
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 1 RESERVED RESERVED
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 5: Control Register 5
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 1 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 0 RESERVED RESERVED
Byte 6: Control Register 6
Bit @Pup Name Description
7 0 SRC[5:4]_AMP1 SRC[5:4] amplitude adjustment
00= 700mV, 01=800mV, 10=900mV, 11= 1000mV
6 1 SRC[5:4]_AMP0
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5 0 SRC[3:1]_AMP1 SRC[3:1] amplitude adjustment
00= 700mV, 01=800mV, 10=900mV, 11= 1000mV
4 1 SRC[3:1]_AMP0
3 0 RESERVED RESERVED
2 1 RESERVED RESERVED
1 0 SRC0_AMP1 SRC0 amplitude adjustment
00= 700mV, 01=800mV, 10=900mV, 11= 1000mV
0 1 SRC0_AMP0
Byte 6: Control Register 6
Byte 7: Vendor ID
Bit @Pup Name Description
7 0 Rev Code Bit 3 Revision Code Bit 3
6 0 Rev Code Bit 2 Revision Code Bit 2
5 0 Rev Code Bit 1 Revision Code Bit 1
4 1 Rev Code Bit 0 Revision Code Bit 0
3 1 Vendor ID bit 3 Vendor ID Bit 3
2 0 Vendor ID bit 2 Vendor ID Bit 2
1 0 Vendor ID bit 1 Vendor ID Bit 1
0 0 Vendor ID bit 0 Vendor ID Bit 0
Byte 8: Control Register 8
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 0 RESERVED RESERVED
5 0 RESERVED RESERVED
4 0 BC4 Byte count register for block read operation.
The default value for Byte count is 9.
In order to read beyond Byte 9, the user should change the byte count
limit.to or beyond the byte that is desired to be read.
31 BC3
21 BC2
11 BC1
01 BC0
Byte 9: Control Register 9
Bit @Pup Name Description
7 0 RESERVED RESERVED
6 1 SRC3_OE Output enable for SRC3
0 = Output Disabled, 1 = Output Enabled
5 1 SRC2_OE Output enable for SRC2
0 = Output Disabled, 1 = Output Enabled
4 0 RESERVED RESERVED
3 0 RESERVED RESERVED
2 0 RESERVED RESERVED
1 0 RESERVED RESERVED
0 1 RESERVED RESERVED

SL28PCIe16ALC

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products PCIe family,6 output PCIe G3, from 25MHz input
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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