PM75CSD060 Datasheet PM75CSD060 | P4-P6

MITSUBISHI <INTELLIGENT POWER MODULES>

PM75CSD060

FLAT-BASE TYPE

INSULATED PACKAGE

Jul. 2005

3.5

—

Main terminal screw : M5

Mounting part screw : M5

—

Symbol

Parameter

Mounting torque

Weight

Test Condition

Unit

N • m

g

Limits

Min.

Typ.

Max.

2.5

—

3.0

560

MECHANICAL RATINGS AND CHARACTERISTICS

VD = 15V, VCIN = 15V

Applied between : U

P-VUPC, VP-VVPC, WP-VWPC

UN • VN • WN-VNC

ID

°C

V

mA

ms

55

18

1.8

2.3

380

320

—

125

—

12.5

—

0.01

15

—

mA

Circuit Current

Input ON Threshold Voltage

Input OFF Threshold Voltage

Over Current Trip Level

Short Circuit Trip Level

Over Current Delay Time

Over Temperature Protection

Supply Circuit Under-Voltage

Protection

Fault Output Current

Minimum Fault Output Pulse

Width

V

th(ON)

Vth(OFF)

OC

SC

t

off(OC)

OT

r

UV

r

IFO(H)

IFO(L)

tFO

Trip level

Reset level

Trip level

Reset level

CONTROL PART

—

1.2

1.7

—

192

115

—

111

—

11.5

—

1.0

Parameter

Symbol

Test Condition

Max.

Min. Typ.

Unit

Limits

40

13

1.5

2.0

—

226

—

241

10

118

100

12.0

12.5

—

10

1.8

(Note-3) Fault output is given only when the internal OC, SC, OT & UV protection.

Fault output of OC, SC and UV protection operate by upper and lower arms.

Fault output of OT protection operate by lower arm.

Fault output of OC, SC protection given pulse.

Fault output of OT, UV protection given pulse while over level.

Base-plate

Temperature detection, V

D = 15V

–20 ≤ T

j ≤ 125°C

V

D = 15V, VCIN = 15V (Note-3)

V

D = 15V (Note-3)

V

µs

V

D = 15V (Fig. 5,6)

–20≤ T

j ≤ 125°C, VD = 15V (Fig. 5,6)

V

D = 15V (Fig. 5,6)

VN1-VNC

VXP1-VXPC

Tj = –20°C

T

j = 25°C

T

j = 125°C

A

RECOMMENDED CONDITIONS FOR USE

Recommended value

Unit

Test Condition

Symbol Parameter

V

Applied across P-N terminals

Applied between : V

UP1-VUPC, VVP1-VVPC

VWP1-VWPC, VN1-VNC (Note-4)

Applied between : U

P-VUPC, VP-VVPC, WP-VWPC

UN • VN • WN-VNC

Using Application Circuit input signal of IPM, 3φ

sinusoidal PWM VVVF inverter (Fig. 8)

For IPM’s each input signals (Fig. 7)

Supply Voltage

Control Supply Voltage

Input ON Voltage

Input OFF Voltage

PWM Input Frequency

Arm Shoot-through

Blocking Time

≤ 400

15 ± 1.5

≤ 0.8

≥ 4.0

≤ 20

≥ 2.5

VCC

VCIN(ON)

VCIN(OFF)

fPWM

tdead

VD

V

kHz

µs

V

(Note-4) Allowable Ripple rating of Control Voltage : dv/dt ≤ ±5V/µs, 2V

p-p

MITSUBISHI <INTELLIGENT POWER MODULES>

PM75CSD060

FLAT-BASE TYPE

INSULATED PACKAGE

Jul. 2005

PRECAUTIONS FOR TESTING

1. Before appling any control supply voltage (V

D), the input terminals should be pulled up by resistores, etc. to their corre-

sponding supply voltage and each input signal should be kept off state.

After this, the specified ON and OFF level setting for each input signal should be done.

2. When performing “OC” and “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not

be allowed to rise above V

CES rating of the device.

(These test should not be done by using a curve tracer or its equivalent.)

10%

90%

trr

Irr

trtd (on)

tc (on) tc (off)

td (off)

V

CIN

Ic

V

CE

10%

10% 10%

90%

tf

(ton= td (on) + tr) (toff= td (off) + tf)

V

D

(all)

U,V,W, (N)

P, (U,V,W)

A

Pulse

V

CE

V

CIN

(15V)

V

D

(all)

U,V,W, (N)

P, (U,V,W)

V

CIN

V

CC

I

C

I

C

I

C

OC

SC

V

CIN

t

off (OC)

U,V,W

N

V

CINN

V

CINP

V

D

V

D

P

Ic

Vcc

V

CINN

0V

V

CINP

t

P, (U,V,W)

U,V,W, (N) U,V,W, (N)

V

D

(all)

IN

Fo

IN

Fo

V

D

(all)

V

CIN

(0V)

Ic

V V

P, (U,V,W)

V

CIN

(15V)

–Ic

P

N

C

S

C

S

U,V,W

Vcc

Ic

V

D

(all)

V

D

(all)

P

U,V,W

V

CIN

V

CIN

V

CIN

(15V)

V

CIN

(15V)

Fo

IN

Fo

IN

Fo

Short Circuit Current

Over Current

Constant Current

Fig. 3 Switching time Test circuit and waveform

Fig. 1 V

CE(sat)

Test Fig. 2 V

EC

Test

a) Lower Arm Switching

Signal input

(Upper Arm)

Signal input

(Lower Arm)

Signal input

(Upper Arm)

Signal input

(Lower Arm)

b) Upper Arm Switching

Fig. 4 I

CES

Test

Fig. 5 OC and SC Test

Fig. 6 OC and SC Test waveform

Fig. 7 Dead time measurement point example

t

dead

t

dead

t

dead

MITSUBISHI <INTELLIGENT POWER MODULES>

PM75CSD060

FLAT-BASE TYPE

INSULATED PACKAGE

Jul. 2005

NOTES FOR STABLE AND SAFE OPERATION ;

•

Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the

stray capacity between the input and output wirings of opto-coupler.

•

Quick opto-couplers: TPLH, TPLH ≤ 0.8µs. Use High CMR type. The line between opto-coupler and intelligent module

should be shortened as much as possible to minimize the floating capacitance.

•

Slow switching opto-coupler: recommend to use at CTR = 100 ~ 200%, Input current = 8 ~ 10mA, to work in active.

•

Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the

power supply.

•

Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N

terminal.

•

Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line

and improve noise immunity of the system.

OUT

Si

GNDGND

In

Vcc

U

V

W

N

P

M

→

IF

+

–

: Interface which is the same as the U-phase

OUT

Si

GNDGND

In

Vcc

OUT

Si

GNDGND

In

Vcc

OUT

Si

GNDGND

In

Fo

Vcc

OUT

Si

GNDGND

In

Fo

TEMP

Vcc

OUT

Si

GND

In

Fo

Vcc

VWP1

WP

VWPC

Th

UN

VN

VN1

WN

VNC

Rfo

Fo

VVP1

VP

VVPC

≥0.1µ

1k

≥0.1µ

20k

≥10µ

20k

≥10µ

≥0.1µ

VFO

WFO

UFO

VUP1

UP

VUPC

NC

→

IF

5V

→

VD

Fig. 8 Application Example Circuit

PM75CSD060

PM75CSD060

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