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Printed in the U.S.A. PN 2460 WW022015
SDSoC generates software accessible accelerators in the programmable logic based on program
pragmas, program analysis, scheduling, and characterized hardware modeling of system connectivity.
SDSoC builds the programmable logic portion of the design leveraging the platform Board Support
Package (BSP), targeted software accelerated functions, IP and optimized libraries and system
connectivity generation. The compiler automatically compiles the system into a complete software-
hardware system, including the bit-stream for programmable logic and the ELF file for the ARM
processing system to configure the target platform.
Each accelerated function in programmable logic runs as an independent thread, and SDSoC
generates necessary hardware and software components to synchronize it and to preserve the original
program semantics, while enabling task-level parallelism and pipelined communication as well as
computation to achieve high performance.
Source C/C++ application code can contain multiple accelerated functions, multiple instances of a
specific function, and invocations of accelerator functions from different sections of the main program.
To facilitate optimal performance SDSoC also provides Xilinx optimized libraries and optional libraries
offered by Xilinx Alliance Members.
By generating complete embedded applications from
a “single golden source”, SDSoC allows software
developers to iterate over design and architectural
changes by refactoring C/C++ code at the
application level, dramatically reducing the time to a
working program running on the platform.
Expert Use Model for Platform Developers
SDSoC provides an expert use model for system architects and platform developers. With the
system-level profiling and performance analysis capability coupled with automated system connectivity
generation, the tool helps architects define, explore and generate architectures to find the ideal,
optimal implementation for their application platforms to hand-off to embedded software developers for
building complete applications on top of the application platforms.
Leveraging the automated system connectivity generation, architects can rapidly define, explore and
generate macro and micro system architectures to determine the optimal interconnect architecture
between the Zynq processing system, memory and programmable logic-based accelerators.
Application-specific platforms can be created with Xilinx’s Vivado
®
Design Suite in combination
with SDSoC. The platform creation also enables the ability to configure legacy RTL and IP to be
leveraged as C-callable libraries. This benefits teams that would like to accelerate the platform
development with design reuse.
SDSoC provides Board Support Packages (BSP) for Zynq All Programmable SoC-based
development boards including the ZC702, ZC706, as well as third party and market specific
platforms including Zedboard, MicroZed, ZYBO and the Video and Imaging development kits.The
BSPs include metadata allowing SDSoC to abstract the platform for embedded software
developers and system architects increasing productivity and accelerating product development.
Conclusion
The SDSoC development environment provides a C/C++ ASSP-like programming experience
improving productivity for application development, system architecture definition and platform
creation. SDSoC enables embedded software developers to accelerate the development of smarter
systems leveraging Zynq All Programmable SoCs and MPSoCs.
Take the NEXT STEP
To learn how SDSoC can streamline your product development, please contact a Xilinx sales representative or
visit: www.xilinx.com/sdsoc
For more information on the SDx family of development environments visit: www.xilinx.com/sdx
For more information on the Zynq All Programmable SoC and MPSoC family of devices visit
http://www.xilinx.com/products/silicon-devices/soc.html
