ISL99140
9
FN8642.1
January 7, 2016
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the ISL99140 can be configured to be compatible with ZL8800
by connecting PWMH to PWM and PWML to EN, as shown in
“Typical Application Circuit with ZL8800” on page 5. In this
example, the tri-state operation is controlled by PWML output of
ZL8800 through ISL99140’s EN input. For detailed design
information, consult the ZL8800
datasheet.
Diode Emulation
Diode emulation allows for higher converter efficiency under light
load situations. With diode emulation active (SMOD pulled low),
the ISL99140 will detect the zero current crossing of the output
inductor and turn off the low-side gate after the minimum LGATE
ON time of 350ns expires. This ensures that Discontinuous
Conduction Mode (DCM) is achieved to minimize losses. Diode
emulation is asynchronous to the PWM signal. Therefore, the
ISL99140 will respond to the SMOD input immediately after it
changes state.
Bootstrap Function
The ISL99140 features an internal bootstrap Schottky diode. A
high quality ceramic capacitor should be place in close proximity
across BOOT and PHASE pins. The bootstrap capacitor can range
between 0.1µF~0.22µF/0402~0603/X5R~X7R for normal buck
switching applications.
Thermal Shutdown Warning (THDN)
The THDN pin is an open drain output and is pulled low when the
internal junction temperature exceeds +150°C. The ISL99140
does not stop operation when the flag is set. This signal is often
fed back to the controller to issue a system thermal shutdown.
When the junction temperature drops below +135°C, the device
will clear the THDN signal.
PCB Layout Considerations
Proper PCB layout will reduce noise coupling to other circuits,
improve thermal performance, and maximize the efficiency. The
following is meant to lead to an optimized layout:
• Place multiple 10µF or greater ceramic capacitors directly at
device between V
IN
and PGND as indicated in Figure 3. This is
the most critical decoupling and reduced parasitic inductance
in the power switching loop. This will reduce overall electrical
stress on the device as well as reduce coupling to other
circuits. Best practice is to place the decoupling capacitors on
the same PCB side as the device.
• Connect PGND to the system GND plane with a large via array
as close to the PGND pins as design rules allow. This improves
thermal and electrical performance.
•Place PVCC, V
CC
and BOOT-PHASE decoupling capacitors at
the IC pins as shown in Figure 3
.
• Note that the SW plane connecting the ISL99140 and inductor
must carry full load current and will create resistive loss if not
sized properly. However, it is also a very noisy node that should
not be oversized or routed close to any sensitive signals. Best
practice is to place the inductor as close to the device as
possible and thus minimizing the required area for the SW
connection. If one must choose a long route of either the V
OUT
side of the inductor or the SW side, choose the quiet V
OUT
side.
Best practice is to locate the ISL99140 as close to the final
load as possible and thus avoid noisy or lossy routes to the
load.
TABLE 2. AVAILABLE EVALUATION BOARDS
EVALUATION BOARDS DESCRIPTION
SMBus/
PMBus/I
2
C
ISL6388EVAL1Z 6-Phase Core VR with ISL99140, 6x6 DrMOS, and the ISL6388, EAPP Digital Controller; Socket R3 Yes
ISL6398EVAL1Z 3-Phase POL VR with ISL99140, 6x6 DrMOS, and the ISL6388, EAPP Digital Controller; On-board Transient Load Yes
