16©2016 Integrated Device Technology, Inc Revision A January 27, 2016
874328I-01 Data Sheet
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
The LVPECL output driver circuit and termination are shown in Figure 6.
Figure 6. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
V
CC
– 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 0.8V
(V
CC_MAX
– V
OH_MAX
) = 0.8V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
1.7V
(V
CC_MAX
– V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OH_MAX
) = [(2V - (V
CC_MAX
– V
OH_MAX
))/R
L
] * (V
CC_MAX
– V
OH_MAX
) =
[(2V – 0.8V)/50] * 0.8V = 19.2mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OL_MAX
) = [(2V – (V
CC_MAX
– V
OL_MAX
))/R
L]
* (V
CC_MAX
– V
OL_MAX
) =
[(2V – 1.7V)/50] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 29.4mW
V
OUT
V
CC
V
CC
- 2V
Q1
RL
50Ω
17©2016 Integrated Device Technology, Inc Revision A January 27, 2016
874328I-01 Data Sheet
Power Considerations (maximum)
This section provides information on power dissipation and junction temperature for the 874328I-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 874328I-01 is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for V
CC
= 2.5V + 5% = 2.625V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipation in the load.
Power (core)
MAX
= V
CC_MAX
* I
CC_MAX
= 2.625V * 54mA = 141.75mW
Power(LVDS)
MAX
= V
CCO_DEF_MAX
* I
CCO_DEF_MAX
= 2.625V * 160mA = 420mW
Power (LVPECL) = 29.4mW/Loaded Output pair
If all outputs are loaded, the total power is 8 * 29.4mW = 235.2mW
Power Dissipation for internal termination R
T
Power (R
T
)
MAX
= (V
IN_MAX
)
2
/ R
T_MIN
= (1.2V)
2
/ 80 = 18mW
Total Power_
MAX
= 141.75mW + 420mW + 235.2mW + 18mW = 814.95mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 31.8°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.815W * 31.8°C/W = 111°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance
JA
for 64 Lead TQFP, E-Pad, Forced Convection
JA
by Velocity
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 31.8°C/W 25.8°C/W 24.2°C/W
18©2016 Integrated Device Technology, Inc Revision A January 27, 2016
874328I-01 Data Sheet
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
The LVPECL output driver circuit and termination are shown in Figure 7.
Figure 7. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
V
CC
– 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 0.8V
(V
CC_MAX
– V
OH_MAX
) = 0.8V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
1.7V
(V
CC_MAX
– V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OH_MAX
) = [(2V - (V
CC_MAX
– V
OH_MAX
))/R
L
] * (V
CC_MAX
– V
OH_MAX
) =
[(2V – 0.8V)/50] * 0.8V = 19.2mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OL_MAX
) = [(2V – (V
CC_MAX
– V
OL_MAX
))/R
L]
* (V
CC_MAX
– V
OL_MAX
) =
[(2V – 1.7V)/50] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 29.4mW
V
OUT
V
CC
V
CC
- 2V
Q1
RL
50Ω

874328BYI-01LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 2.5V Differential Clock Divider/Buffer
Lifecycle:
New from this manufacturer.
Delivery:
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