AD9760
–17–
REV. B
I
OUTFS
and R
LOAD
can be selected as long as the positive compli-
ance range is adhered to. One additional consideration in this
mode is the integral nonlinearity (INL) as discussed in the Ana-
log Output section of this data sheet. For optimum INL perfor-
mance, the single-ended, buffered voltage output configuration
is suggested.
AD9760
I
OUTA
I
OUTB
21
50⍀
25⍀
50⍀
V
OUTA
= 0 TO +0.5V
I
OUTFS
= 20mA
22
Figure 53. 0 V to +0.5 V Unbuffered Voltage Output
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 54 shows a buffered single-ended output configuration
in which the op amp U1 performs an I-V conversion on the
AD9760 output current. U1 maintains I
OUTA
(or I
OUTB
) at a
virtual ground, thus minimizing the nonlinear output impedance
effect on the DAC’s INL performance as discussed in the Ana-
log Output section. Although this single-ended configuration
typically provides the best dc linearity performance, its ac distor-
tion performance at higher DAC update rates may be limited by
U1’s slewing capabilities. U1 provides a negative unipolar out-
put voltage and its full-scale output voltage is simply the product
of R
FB
and I
OUTFS
. The full-scale output should be set within
U1’s voltage output swing capabilities by scaling I
OUTFS
and/or
R
FB
. An improvement in ac distortion performance may result
with a reduced I
OUTFS
since the signal current U1 will be required
to sink will be subsequently reduced.
AD9760
22
I
OUTA
I
OUTB
21
C
OPT
200⍀
U1
V
OUT
= I
OUTFS
ⴛ R
FB
I
OUTFS
= 10mA
R
FB
200⍀
Figure 54. Unipolar Buffered Voltage Output
POWER AND GROUNDING CONSIDERATIONS
In systems seeking to simultaneously achieve high speed and
high performance, the implementation and construction of the
printed circuit board design is often as important as the circuit
design. Proper RF techniques must be used in device selection,
placement and routing, and supply bypassing and grounding.
The evaluation board for the AD9760, which uses a four-layer
PC board, serves as a good example for the above-mentioned
considerations. Figures 60–65 illustrate the recommended
printed circuit board ground, power and signal plane layouts
that are implemented on the AD9760 evaluation board.
Proper grounding and decoupling should be a primary objective
in any high speed, high resolution system. The AD9760 features
separate analog and digital supply and ground pins to optimize
the management of analog and digital ground currents in a
system. In general, AVDD, the analog supply, should be de-
coupled to ACOM, the analog common, as close to the chip as
physically possible. Similarly, DVDD, the digital supply, should
be decoupled to DCOM as close as physically possible.
For those applications that require a single +5 V or +3 V supply
for both the analog and digital supply, a clean analog supply
may be generated using the circuit shown in Figure 55. The
circuit consists of a differential LC filter with separate power
supply and return lines. Lower noise can be attained using low
ESR type electrolytic and tantalum capacitors.
100F
ELECT.
10-22F
TANT.
0.1F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V OR +3V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
Figure 55. Differential LC Filter for Single +5 V or +3 V
Applications
Maintaining low noise on power supplies and ground is critical
to obtain optimum results from the AD9760. If properly imple-
mented, ground planes can perform a host of functions on high
speed circuit boards: bypassing, shielding, current transport,
etc. In mixed signal design, the analog and digital portions of
the board should be distinct from each other, with the analog
ground plane confined to the areas covering the analog signal
traces, and the digital ground plane confined areas covering the
digital interconnects.
All analog ground pins of the DAC, reference and other analog
components should be tied directly to the analog ground plane.
The two ground planes should be connected by a path 1/8 to
1/4 inch wide underneath or within 1/2 inch of the DAC to
maintain optimum performance. Care should be taken to ensure
that the ground plane is uninterrupted over crucial signal paths.
On the digital side, this includes the digital input lines running
to the DAC as well as any clock signals. On the analog side, this
includes the DAC output signal, reference signal and the supply
feeders.
The use of wide runs or planes in the routing of power lines is
also recommended. This serves the dual role of providing a low
series impedance power supply to the part and providing some
“free” capacitive decoupling to the appropriate ground plane. It
is essential that care be taken in the layout of signal and power
ground interconnects to avoid inducing extraneous voltage
drops in the signal ground paths. It is recommended that all
connections be short, direct and as physically close to the pack-
age as possible to minimize the sharing of conduction paths
between different currents. When runs exceed an inch in length,
strip line techniques with proper termination resistor should be
considered. The necessity and value of this resistor will be de-
pendent upon the logic family used.
For a more detailed discussion of the implementation and con-
struction of high speed, mixed signal printed circuit boards,
refer to Analog Devices’ application notes AN-280 and AN-333.
