MAX6361–MAX6364
Detailed Description
The
Typical Operating Circuit
shows a typical connection
for the MAX6361–MAX6364 family. OUT powers the stat-
ic random-access memory (SRAM). OUT is internally
connected to V
CC
if V
CC
is greater than the reset thresh-
old, or to the greater of V
CC
or V
BATT
when V
CC
is less
than the reset threshold. OUT can supply up to 150mA
from V
CC
. When V
CC
is higher than V
BATT
, the BATT ON
(MAX6363) output is low. When V
CC
is lower than V
BATT
,
an internal MOSFET connects the backup battery to
OUT. The on-resistance of the MOSFET is a function of
backup-battery voltage and is shown in the Battery to
Out On-Resistance vs. Temperature graph in the
Typical
Operating Characteristics
section.
Backup-Battery Switchover
In a brownout or power failure, it may be necessary to
preserve the contents of the RAM. With a backup bat-
tery installed at BATT, the MAX6361–MAX6364 auto-
matically switch the RAM to backup power when V
CC
falls. The MAX6363 has a BATT ON output that goes
high when in battery-backup mode. These devices
require two conditions before switching to battery-
backup mode:
1) V
CC
must be below the reset threshold.
2) V
CC
must be below V
BATT
.
Table 1 lists the status of the inputs and outputs in bat-
tery-backup mode. The device will not power up if the
only voltage source is on BATT. OUT will only power up
from V
CC
at startup.
Manual Reset Input (MAX6361 Only)
Many µP-based products require manual reset capabili-
ty, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. For the MAX6361, a logic
low on MR asserts reset. Reset remains asserted while
MR is low, and for a minimum of 150ms (t
RP
) after it
returns high. MR has an internal 20kΩ pull-up resistor to
V
CC
. This input can be driven with TTL/CMOS logic lev-
els or with open-drain/collector outputs. Connect a nor-
mally open momentary switch from MR to GND to create
a manual reset function; external debounce circuitry is
not required. If MR is driven from long cables or the
device is used in a noisy environment, connect a 0.1µF
capacitor from MR to GND to provide additional noise
immunity.
Watchdog Input (MAX6362 Only)
The watchdog monitors µP activity through the input
WDI. If the µP becomes inactive, the reset output is
asserted in pulses. To use the watchdog function, con-
nect WDI to a bus line or µP I/O line. A change of state
(high to low or low to high) within the watchdog timeout
period (t
WD
) with a 100ns minimum pulse width clears
the watchdog timer. If WDI remains high or low for longer
than the watchdog timeout period, the internal watchdog
timer runs out and a reset pulse is triggered for the reset
timeout period (t
RP
). The internal watchdog timer clears
whenever reset asserts or the WDI sees a rising or falling
edge within the watchdog timeout period. If WDI remains
in a high or low state for an extended period of time, a
reset pulse asserts after every watchdog timeout period
(t
WD
) (Figure 1).
Reset In (MAX6364 Only)
RESET IN is compared to an internal 1.235V reference.
If the voltage at RESET IN is less than 1.235V, reset is
asserted. The RESET IN comparator may be used as
an undervoltage detector to signal a failing power sup-
ply. It can also be used as a secondary power-supply
reset monitor.
To program the reset threshold (V
RTH
) of the secondary
power supply, use the following equation (see
Typical
Operating Circuit
):
where V
REF
= 1.235V. To simplify the resistor selection,
choose a value for R2 and calculate R1:
Since the input current at RESET IN is 25nA (max), large
values (up to 1MΩ) can be used for R2 with no signifi-
cant loss in accuracy. For example, in the
Typical
SOT23, Low-Power µP Supervisory Circuits
with Battery Backup
6 _______________________________________________________________________________________
Table 1. Input and Output Status in
Battery-Backup Mode
PIN STATUS
V
CC
Disconnected from OUT
OUT Connected to BATT
BATT
Connected to OUT. Current drawn from
the battery is less than 1µA (at V
BATT
=
2.8V, excluding I
OUT
) when V
CC
= 0.
RESET/RESET
Asserted
BATT ON High state
MR, RESET IN,
WDI
Inputs ignored
