AD7694BRMZ Datasheet AD7694BRMZ, AD7694ARMZ, AD7694ARMZRL7 | P13-P15

AD7694 Data Sheet

APPLICATION INFORMATION

SW+

MSB

16,384C

IN+

LSB

COMP

CONTROL

LOGIC

SWITCHES CONTROL

BUSY

OUTPUT CODE

CNV

REF

GND

IN–

4C 2C

C32,768C

SW–

MSB

16,384C

LSB

4C 2C

C32,768C

05003-018

Figure 18. ADC Simplified Schematic

CIRCUIT INFORMATION

The AD7694 is a low power, single-supply, 16-bit ADC using a

successive approximation architecture. It is capable of con-

verting 250,000 samples per second (250 kSPS) and powers

down between conversions. When operating at 100 SPS, for

example, it typically consumes 4 µW, ideal for battery-powered

applications.

The AD7694 provides the user with on-chip, track-and-hold

and does not exhibit any pipeline delay or latency, making it

ideal for multiple, multiplexed channel applications.

The AD7694 is specified from 2.7 V to 5.25 V. It is housed in an

8-lead MSOP. The AD7694 is an improved second source to

LTC1864 and LTC1864L. For even better performance, the

AD7685 should be considered.

CONVERTER OPERATION

The AD7694 is a successive approximation ADC based on a

charge redistribution DAC. Figure 18 shows the simplified

schematic of the ADC. The capacitive DAC consists of two

identical arrays of 16 binary weighted capacitors, which are

connected to the two comparator inputs.

During the acquisition phase, terminals of the array tied to the

comparator’s input are connected to GND via SW+ and SW−.

All independent switches are connected to the analog inputs.

Thus, the capacitor arrays are used as sampling capacitors and

acquire the analog signal on the IN+ and IN− inputs. When the

acquisition phase is complete and the CNV input goes high, a

conversion phase begins. When the conversion phase begins,

SW+ and SW− are opened first. The two capacitor arrays are

then disconnected from the inputs and connected to the GND

input. Thus, the differential voltage between the inputs, IN+

and IN−, captured at the end of the acquisition phase applies to

the comparator inputs, causing the comparator to become

unbalanced. By switching each element of the capacitor array

between GND and REF, the comparator input varies by binary

weighted voltage steps (V

REF

/2, V

REF

/4 … V

REF

/65536). The

control logic toggles these switches, starting with the MSB, in

order to bring the comparator back into a balanced condition.

After the completion of this process, the part returns to the

acquisition phase and the control logic generates the ADC

output code.

Because the AD7694 has an on-board conversion clock, the

serial clock, SCK, is not required for the conversion process.

TRANSFER FUNCTIONS

The ideal transfer function for the AD7694 is shown in

Figure 19 and Table 8.

000...000

000...001

000...010

111...101

111...110

111...111

ADC CODE (STRAIGHT BINARY)

ANALOG INPUT

+FS – 1.5 LSB

FS – 1 LSB

–FS + 1 LSB

–FS

–

FS + 0.5 LSB

05003-019

Figure 19. ADC Ideal Transfer Function

Table 8. Output Codes and Ideal Input Voltages

Description

Analog Input

REF

= 5 V

Digital Output Code

Hexadecimal

FSR – 1 LSB

4.999924 V

FFFF

Midscale + 1 LSB 2.500076 V 8001

Midscale 2.5 V 8000

Midscale – 1 LSB 2.499924 V 7FFF

–FSR + 1 LSB 76.3 µV 0001

–FSR

0 V

0000

This is also the code for an overranged analog input (V

IN+

– V

IN–

above

REF

– V

GND

This is also the code for an underranged analog input (V

IN+

– V

IN–

below V

GND

Rev. B | Page 12 of 16

Data Sheet AD7694

05003-020

AD7694

REF

GND

VDD

IN–

IN+

SCK

SDO

CNV

3-WIRE INTERFACE

100nF

2.7V TO 5.25V

2.2 TO 10µF

(NOTE 2)

REF

0 TO V

REF

33Ω

2.7nF

(NOTE 3)

(NOTE 4)

(NOTE 1)

NOTES

1. SEE REFERENCE SECTION FOR REFERENCE SELECTION.

2. C

REF

IS USUALLY A 10µF CERAMIC CAPACITOR (X5R).

3. SEE DRIVER AMPLIFIER CHOICE SECTION.

4. OPTIONAL FILTER. SEE ANALOG INPUT SECTION.

Figure 20. Typical Application Diagram

TYPICAL CONNECTION DIAGRAM

Figure 20 shows an example of the recommended application

diagram for the AD7694.

ANALOG INPUT

Figure 21 shows an equivalent circuit of the AD7694 input

structure. The two diodes, D1 and D2, provide ESD protection

for the analog inputs, IN+ and IN−. Care must be taken to

ensure that the analog input signal never exceeds the supply

rails by more than 0.3 V, because this will cause these diodes to

become forward-biased and start conducting current. However,

these diodes can handle a forward-biased current of 130 mA

maximum. For instance, these conditions could eventually

occur when the input buffer’s (U1) supplies are different from

VDD. In such a case, an input buffer with a short-circuit,

current limitation can be used to protect the part.

05003-021

IN+

OR IN–

GND

VDD

Figure 21. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the

differential signal between IN+ and IN−. By using this

differential input, small signals common to both inputs are

rejected. For instance, by using IN− to sense a remote signal

ground, ground potential differences between the sensor and

the local ADC ground are eliminated. During the acquisition

phase, the impedance of the analog input IN+ can be modeled

as a parallel combination of the capacitor C

and the network

formed by the series connection of R

and C

. C

is primarily

the pin capacitance. R

is typically 600 Ω and is a lumped

component made up of some serial resistors and the on

resistance of the switches. C

is typically 30 pF and is mainly

the ADC sampling capacitor. During the conversion phase,

where the switches are opened, the input impedance is limited

to C

. R

and C

make a 1-pole, low-pass filter that reduces

undesirable aliasing effects and limits the noise.

When the source impedance of the driving circuit is low, the

AD7694 can be driven directly. Large source impedances

significantly affect the ac performance, especially total

harmonic distortion (THD). The dc performances are less

sensitive to the input impedance.

DRIVER AMPLIFIER CHOICE

Although the AD7694 is easy to drive, the driver amplifier

needs to meet the following requirements:

• The noise generated by the driver amplifier needs to be

kept as low as possible to preserve the SNR and transition

noise performance of the AD7694. Note that the AD7694

has a noise much lower than most of the other

16-bit ADCs and, therefore, can be driven by a noisier op

amp while preserving the same or better system perfor-

mance. The noise coming from the driver is filtered by the

AD7694 analog input circuit 1-pole, low-pass filter made

by R1 and C2 or by the external filter, if one is used.

• For ac applications, the driver needs to have a THD

performance suitable to that of the AD7694. Figure 13

gives the THD vs. frequency that the driver should exceed.

• For multichannel, multiplexed applications, the driver

amplifier and the AD7694 analog input circuit must be

able to settle for a full-scale step of the capacitor array at a

16-bit level (0.0015%). In the amplifier’s data sheet, settling

at 0.1% to 0.01% is more commonly specified. This could

differ significantly from the settling time at a 16-bit level

and should be verified prior to driver selection.

Rev. B | Page 13 of 16

AD7694 Data Sheet

Table 9. Recommended Driver Amplifiers

Amplifier Typical Application

AD8021 Very low noise and high frequency

AD8022 Low noise and high frequency

OP184 Low power, low noise, and low frequency

AD8605, AD8615 5 V single-supply and low power

AD8519 Small, low power, and low frequency

AD8031 High frequency and low power

VOLTAGE REFERENCE INPUT

The AD7694 voltage reference input, REF, has a dynamic input

impedance and should therefore be driven by a low impedance

source with efficient decoupling between the REF and GND

pins, as explained in the Layout section.

When REF is driven by a very low impedance source (for

example, an unbuffered reference voltage like the low

temperature drift ADR43x reference or a reference buffer using

the AD8031 or the AD8605), a 10 µF (X5R, 0805 size) ceramic

chip capacitor is appropriate for optimum performance.

If desired, smaller reference decoupling capacitor values down

to 2.2 µF can be used with a minimal impact on performance,

especially DNL.

POWER SUPPLY

The AD7694 powers down automatically at the end of each

conversion phase and, therefore, the power scales linearly with

the sampling rate, as shown in Figure 22. This makes the part

ideal for a low sampling rate (even a few Hz) and low battery-

powered applications.

10,000

1,000

100

0.1

0.01

10 100 1k 10k 100k 1M

05003-022

SAMPLING RATE (SPS)

OPERATING CURRENT (µA)

VDD = 5V

VDD = 2.7V

Figure 22. Operating Current vs. Sampling Rate

SUPPLYING THE ADC FROM THE REFERENCE

For simplified applications, the AD7694, with its low operating

current, can be supplied directly using the reference circuit, as

shown in Figure 23. The reference line can be driven by either

• The system power supply directly

• A reference voltage with enough current output capability,

such as the ADR43x

• A reference buffer, such as the AD8031, that can also filter

the system power supply, as shown in Figure 23

05003-023

AD8031

AD7694

REF VDD

2.2

10µF

1µF

10Ω

10kΩ

5V OR 3V

1µF

(NOTE 1)

NOTES

1. OPTIONAL REFERENCE BUFFER AND FILTER.

Figure 23. Example of an Application Circuit

Rev. B | Page 14 of 16

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P17

AD7694BRMZ

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Analog to Digital Converters - ADC 250 kSPS 16-BIT

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