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MC10EL89DG

P1-P3P4-P6P7-P8
MC10EL89
http://onsemi.com
4
Table 6. AC CHARACTERISTICS V
CC
= 5.0 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
= −5.0 V (Note 9)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Toggle Frequency 1.5 Gb/s
t
PLH
t
PHL
Propagation Delay to
Output
200 340 480 260 350 440 310 400 490 ps
t
SKEW
Within-Device Skew 5 20 5 20 5 20 ps
t
JITTER
Random Clock Jitter (RMS) 5 5 5 ps
V
PP
Input Swing (Note 10) 150 150 400 150 mV
t
r
t
f
Output Rise/Fall Times Q
(20% − 80%)
205 330 455 205 330 455 205 330 455 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. V
EE
can vary +0.25 V / −0.5 V.
10.V
PP(min)
is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈ 40.
150 150
V
EE
0.1F
75
75
75 COAX
0.1F
75
75
75 COAX
EL89
DC BLOCKING CAPACITORS
Figure 2. EL89 CATV Termination Configuration
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50
Z
o
= 50
50 50
V
TT
V
TT
= V
CC
− 3.0 V
MC10EL89
http://onsemi.com
5
ORDERING INFORMATION
Device Package Shipping
†
MC10EL89D SOIC−8 98 Units / Rail
MC10EL89DG SOIC−8
(Pb−Free)
98 Units / Rail
MC10EL89DR2 SOIC−8 2500 / Tape & Reel
MC10EL89DR2G SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC10EL89DT TSSOP−8 100 Units / Rail
MC10EL89DTG TSSOP−8
(Pb−Free)
100 Units / Rail
MC10EL89DTR2 TSSOP−8 2500 / Tape & Reel
MC10EL89DTR2G TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10EL89MNR4 DFN8 1000 / Tape & Reel
MC10EL89MNR4G DFN8
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D −
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
MC10EL89
http://onsemi.com
6
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
SEATING
PLANE
1
4
58
N
J
X 45
_
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
B
S
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) Z
S
X
S
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒ
mm
inches
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
P1-P3P4-P6P7-P8

MC10EL89DG

Mfr. #:
Buy MC10EL89DG
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 5V ECL Coaxial Cable Driver
Lifecycle:
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