AS7C1026C
12/5/06, v 1.0 Alliance Memory P. 2 of 9
®
Functional description
The AS7C1026C is a 5V high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized
as 65,536 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing
are
desired.
Eq
ual address access and cycle times (t
AA
, t
RC
, t
WC
) of 15 ns with output enable access times (t
OE
) of 6 ns are ideal for high-
performance applications.
Wh
en CE
is high, the device enters standby mode. If inputs are still toggling, the device will consume I
SB
power. If the bus is
static, then full standby power is reached (I
SB1
).
A write cycle is accomplished by asserting write enable (WE
) and chip enable (CE). Data on the input pins I/O0 through I/O15
is written on the rising edge of WE
(write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should
drive I/O pins only after outputs have been disabled with output enable (OE
) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE
) and chip enable (CE) with write enable (WE) high. The chip
drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive or
wr
ite enable is active, output drivers stay in high-impedance mode.
T
he device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be
wr
itten and read. LB
controls the lower bits, I/O0 through I/O7, and UB controls the higher bits, I/O8 through I/O15.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5 V supply. The AS7C1026C is packaged in
co
mmon industry standard packages.
N
ote:
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
a
bsolute maximum rating conditions for extended periods may affect reliability.
Key: H = high, L = low, X = don’t care.
Absolute maximum ratings
Parameter Symbol Min Max Unit
Voltage on V
CC
relative to GND V
t1
–0.50 +7.0 V
Voltage on any pin relative to GND V
t2
–0.50 V
CC
+0.50 V
Power dissipation P
D
– 1.25 W
Storage temperature (plastic) T
stg
–55 +125 °C
Ambient temperature with VCC applied T
bias
–55 +125 °C
DC current into outputs (low) I
OUT
– 50 mA
Truth table
CE WE OE LB UB I/O0–I/O7 I/O8–I/O15 Mode
H X X X X High Z High Z Standby (I
SB
), I
SBI
)
L H L L H D
OUT
High Z Read I/O0–I/O7 (I
CC
)
L H L H
L High Z D
OUT
Read I/O8–I/O15 (I
CC)
L H L L L D
OUT
D
OUT
Read I/O0–I/O15 (I
CC
)
L L X L L D
IN
D
IN
Write I/O0–I/O15 (I
CC
)
L L X L H D
IN
High Z Write I/O0–I/O7 (I
CC
)
L L X H L High Z D
IN
Write I/O8–I/O15 (I
CC
)
L
L
H
X
H
X
X
H
X
H
High Z High Z Ou
tput disable (I
CC
)
