6
LT1111
1111fd
Gain block A2 can serve as a low-battery detector. The
negative input of A2 is the 1.25V reference. A resistor
divider from V
IN
to GND, with the mid-point connected to
the SET pin provides the trip voltage in a low-battery
detector application. AO can sink 300µA (use a 22k
resistor pull-up to 5V).
A resistor connected between the I
LIM
pin and V
IN
sets
maximum switch current. When the switch current ex-
ceeds the set value, the switch cycle is prematurely
terminated. If current limit is not used, I
LIM
should be tied
directly to V
IN
. Propagation delay through the current limit
circuitry is approximately 1µs.
In step-up mode the switch emitter (SW2) is connected to
ground and the switch collector (SW1) drives the induc-
tor; in step-down mode the collector is connected to V
IN
and the emitter drives the inductor.
The LT1111-5 and LT1111-12 are functionally identical to
the LT1111. The -5 and -12 versions have on-chip voltage
setting resistors for fixed 5V or 12V outputs. Pin 8 on the
fixed versions should be connected to the output. No
external resistors are needed.
The LT1111 is a gated oscillator switcher. This type
architecture has very low supply current because the
switch is cycled when the feedback pin voltage drops
below the reference voltage. Circuit operation can best be
understood by referring to the LT1111 block diagram.
Comparator A1 compares the feedback (FB) pin voltage
with the 1.25V reference signal. When FB drops below
1.25V, A1 switches on the 72kHz oscillator. The driver
amplifier boosts the signal level to drive the output NPN
power switch. The switch cycling action raises the output
voltage and FB pin voltage. When the FB voltage is suffi-
cient to trip A1, the oscillator is gated off. A small amount
of hysteresis built into A1 ensures loop stability without
external frequency compensation. When the comparator
output is low, the oscillator and all high current circuitry is
turned off, lowering device quiescent current to just 300µA.
The oscillator is set internally for 7µs ON time and 7µs OFF
time, optimizing the device for circuits where V
OUT
and V
IN
differ by roughly a factor of 2. Examples include a 3V to 5V
step-up converter or a 9V to 5V step-down converter.
W
IDAGRA
B
L
O
C
K
S
LT1111 • BD01
IN
V
GND
SET
A0
A2
1.25V
REFERENCE
A1
OSCILLATOR
DRIVER
SW1
SW2
LIM
I
GAIN BLOCK/
ERROR AMP
COMPARATOR
+
–
+
–
FB
LT1111-5/LT1111-12
LT1111
LT1111 • BD02
IN
V
GND
SET
A0
A2
1.25V
REFERENCE
A1
OSCILLATOR
DRIVER
R1
SW1
SW2
LIM
I
R2
220k
SENSE
LT1111-5:
LT1111-12:
R1 = 73.5k
R1 = 25.5k
GAIN BLOCK/
ERROR AMP
COMPARATOR
+
–
+
–
OPERATIO
U
