SZESD7241N2T5G

© Semiconductor Components Industries, LLC, 2016
October, 2017 Rev. 1
1 Publication Order Number:
ESD7241/D
ESD7241, SZESD7241
ESD Protection Diode
UltraLow Capacitance
MicroPackaged Diodes for ESD Protection
The ESD7241 is designed to protect voltage sensitive components
that require ultralow capacitance from ESD and transient voltage
events. It has industry leading capacitance linearity over voltage
making it ideal for RF applications. This capacitance linearity
combined with the extremely small package and low insertion loss
makes this part well suited for use in antenna line applications for
wireless handsets and terminals.
Features
Industry Leading Capacitance Linearity Over Voltage
UltraLow Capacitance: < 1.0 pF Max
Insertion Loss: 0.15 dB at 1 GHz; 0.60 dB at 3 GHz
Low Leakage: < 0.5 mA
Protection for the following IEC Standards:
IEC6100042 (ESD): Level 4 ±28 kV Contact
IEC6100044 (EFT): 40 A 5/50 ns
IEC6100045 (Lightning): 2.5 A (8/20 ms)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AECQ101 Qualified and
PPAP Capable
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
RF Signal ESD Protection
Near Field Communications
USB 3.x Vbus Protection
MAXIMUM RATINGS (T
A
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
IEC 6100042 (ESD) (Note 1) ±28 kV
Total Power Dissipation (Note 2) @ T
A
= 25°C
Thermal Resistance, JunctiontoAmbient
°P
D
°
R
q
JA
300
400
mW
°C/W
Junction and Storage Temperature Range T
J
, T
stg
55 to
+150
°C
Lead Solder Temperature Maximum
(10 Second Duration)
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Nonrepetitive current pulse at T
A
= 25°C, per IEC6100042 waveform.
2. Mounted with recommended minimum pad size, DC board FR4
Device Package Shipping
ORDERING INFORMATION
www.onsemi.com
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
ESD7241N2T5G X2DFN2
(PbFree)
8000 / Tape &
Reel
MARKING
DIAGRAM
2 = Specific Device Code
M = Date Code
X2DFN2
CASE 714AB
2 M
G
SZESD7241N2T5G X2DFN2
(PbFree)
8000 / Tape &
Reel
8:1
ESD7241, SZESD7241
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
I
PP
Maximum Reverse Peak Pulse Current
V
C
Clamping Voltage @ I
PP
V
RWM
Working Peak Reverse Voltage
I
R
Maximum Reverse Leakage Current @ V
RWM
V
BR
Breakdown Voltage @ I
T
I
T
Test Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
BiDirectional
I
PP
I
PP
V
I
I
R
I
T
I
T
I
R
V
RWM
V
C
V
BR
V
RWM
V
C
V
BR
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted)
Parameter Symbol Condition Min Typ Max Unit
Reverse Working Voltage V
RWM
24 V
Breakdown Voltage V
BR
I
T
= 1 mA (Note 3) 24.3 25 28 V
Reverse Leakage Current I
R
V
RWM
= 24 V 0.5
mA
Clamping Voltage TLP V
C
I
PP
= 8 A (Note 4) 38 V
Clamping Voltage TLP V
C
I
PP
= 16 A (Note 4) 48 V
Junction Capacitance C
J
V
R
= 0 V, f = 1 MHz
V
R
= 0 V, f = 1 GHz
1.0
0.7
pF
Dynamic Resistance R
DYN
TLP Pulse 0.84
W
Insertion Loss f = 1 GHz
f = 3 GHz
0.15
0.58
dB
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
4. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z
0
= 50 W, t
p
= 100 ns, t
r
= 4 ns, averaging window; t
1
= 30 ns to t
2
= 60 ns.
TYPICAL CHARACTERISTICS
Figure 1. Typical IEC6100042 + 8 kV Contact
ESD Clamping Voltage
Figure 2. Typical IEC6100042 8 kV Contact
ESD Clamping Voltage
TIME (ns) TIME (ns)
150125100755025025
20
0
20
40
80
100
140
150125100755025025
120
100
80
60
20
0
20
VOLTAGE (V)
VOLTAGE (V)
60
120
40
140
ESD7241, SZESD7241
www.onsemi.com
3
IEC 6100042 Spec.
Level
Test Volt-
age (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
I
peak
90%
10%
IEC6100042 Waveform
100%
I @ 30 ns
I @ 60 ns
t
P
= 0.7 ns to 1 ns
Figure 3. IEC6100042 Spec
Figure 4. Diagram of ESD Clamping Voltage Test Setup
50 W
Cable
Device
Under
Test
Oscilloscope
ESD Gun
50 W
The following is taken from Application Note
AND8308/D Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC6100042 waveform. Since the
IEC6100042 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.

SZESD7241N2T5G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
TVS Diodes / ESD Suppressors SZ 24V VRWM ESD PROTECTIO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet