Datasheet
www.rohm.com TSZ02201-0RAR0G200180-1-2
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16/18
17.Jan.2014 Rev.001
TSZ22111･15･001
BU7445HFV BU7445SHFV
Operational Notes – continued
12. Input Voltage
Applying (VSS-0.3) to (VDD+0.3) to the input terminal is possible without causing deterioration of the electrical
characteristics or destruction, regardless of the supply voltage. However, this does not ensure normal circuit operation.
Please note that the circuit operates normally only when the input voltage is within the common mode input voltage
range of the electric characteristics.
13. Power Supply(single/dual)
The op-amp operates when the voltage supplied is between VDD and VSS. Therefore, the single supply op-amp can
be used as dual supply op-amp as well.
14. Output Capacitor
If a large capacitor is connected between the output pin and VSS pin, current from the charged capacitor will flow into
the output pin and may destroy the IC when the VDD pin is shorted to ground or pulled down to 0V. Use a capacitor
smaller than 0.1uF between output pin and VSS pin.
15. Oscillation caused by Output Capacitor
Please pay attention to the oscillation caused by output capacitor when designing an application of negative feedback
loop circuit with these ICs.
16. Latch up
Be careful of input voltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up and
protect the IC from abnormaly noise.
