MAX2335
Power-Supply Layout
To minimize coupling between different sections of the
IC, use a star configuration, which has a large decou-
pling capacitor at a central V
CC
node. The V
CC
traces
branch out from this node, each going to a separate
V
CC
pin of the MAX2335. At the end of each trace is a
bypass capacitor with impedance to ground less than
1Ω at the frequency of interest. This arrangement pro-
vides local decoupling at each V
CC
pin. Use at least
one via per bypass capacitor for a low-inductance
ground connection. Also, connect the exposed paddle
to the PC board GND with multiple vias to provide the
lowest inductance ground connection possible.
Matching Network Layout
The layout of a matching network can be very sensitive
to parasitic circuit elements. To minimize parasitic
inductance, keep all traces short and place compo-
nents as close to the IC as possible.
Use high-Q components for the LNA input-matching
network to achieve the lowest possible noise figure.
Keep the distance between the differential signal lines
at the mixer outputs constant and make both lines of
equal length to ensure signal balance.
Chip Information
PROCESS: SiGe
450MHz CDMA/OFDM LNA/Mixer
8 _______________________________________________________________________________________
Table 3. MAX2335 Mixer Input Impedance
in HGHL Mode
Table 4. MAX2335 Mixer Output
Impedance (Shunt RC) in HGHL Mode
